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We present a set of tools for digital design, integration and verification of mixed-signal Application Specific Integrated Circuits (ASIC) developed within our design team. We have chosen Python for the development of the tools. By drawing on Python's features we have developed tools targeting many steps required across a design flow: a) Complex digital blocks are auto-generated, where Python generates,...
ICT systems have become an integral part of business and life. At the same time, these systems have become extremely complex. In such systems exist numerous vulnerabilities waiting to be exploited by potential threat actors. pwnPr3d is a novel modelling approach that performs automated architectural analysis with the objective of measuring the cyber security of the modeled architecture. Its integrated...
Network virtualization offers flexibility by decoupling virtual network from the underlying physical network. Software-Defined Network (SDN) could utilize the virtual network. For example, in Software-Defined Networks, the entire network can be run on commodity hardware and operating systems that use virtual elements. However, this could present new challenges of data plane performance. In this paper,...
Porting sequential applications to heterogeneous HPC systems requires extensive software and hardware expertise to estimate the potential speedup and to efficiently use the available compute resources in such systems. To streamline this daunting process, researchers have proposed several “black-box” performance prediction approaches that rely on the performance of a training set of parallel applications...
Block traces are widely used for system studies, model verifications, and design analyses in both industry and academia. While such traces include detailed block access patterns, existing trace-driven research unfortunately often fails to find true-north due to a lack of runtime contexts such as user idle periods and system delays, which are fundamentally linked to the characteristics of target storage...
Modern software systems provide many configuration options which significantly influence their non-functional properties. To understand and predict the effect of configuration options, several sampling and learning strategies have been proposed, albeit often with significant cost to cover the highly dimensional configuration space. Recently, transfer learning has been applied to reduce the effort...
Smart Grids, the next-generation power grids, are equipped with modern technologies to address the increasing demand on the quality of the power supply in the traditional power grids. Power grid is a critical infrastructure with reliability being one of its key quality attributes. In our research, we aim at developing an approach for reliability analysis that would take into account multi-layered...
Large-scale graph analysis or also called network analysis of networks is supported by different algorithms, among the most relevant are PageRank (Web page ranking), Betweenness centrality (centrality in a graph) and Community Detection, these by of their complexity and the large amount of data that process diverse applications, increasingly need to use computational resources such as processor, memory...
Speculative Multithreading (SpMT) technology is an effective mechanism for automatic parallelization of irregular programs. For a sequential program, they can be executed speculatively in parallel by speculating that many data dependences are unlikely during runtime. Although speculative parallelization can potentially deliver significant speedup, several overheads associated with this technique can...
The performance model of an application can provide understanding about its runtime behavior on particular hardware. Such information can be analyzed by developers for performance tuning. However, model building and analyzing is frequently ignored during software development until performance problems arise because they require significant expertise and can involve many time-consuming application...
Model-Based Testing rises hopes of project teams of meeting both eager time and budget constraints as well as achieving better system quality by thorough testing. However, toolchain and method impose a certain skill set on the project engineer. This paper presents a possible way forward and introduces the constraints to the system architecture.
Conventional system simulators are readily used by computer architects to design and evaluate their processor designs. These simulators provide reasonable levels of accuracy and execution detail but suffer from long simulation latencies and increased implementation complexity. In this work we propose iQ, a queue-based modeling technique that targets design space exploration and optimization studies...
Die-stacked DRAM (a.k.a., on-chip DRAM) provides much higher bandwidth and lower latency than off-chip DRAM. It is a promising technology to break the "memory wall". Die-stacked DRAM can be used either as a cache (i.e., DRAM cache) or as a part of memory (PoM). A DRAM cache design would suffer from more page faults than a PoM design as the DRAM cache cannot contribute towards capacity of...
Cyber-Physical Systems (CPS) consist of embedded computers with sensing and actuation capability, and are integrated into and tightly coupled with a physical system. Because the physical and cyber components of the system are tightly coupled, cyber-security is important for ensuring the system functions properly and safely. However, the effects of a cyberattack on the whole system may be difficult...
This paper investigates the problem of deriving a white box performance model of Hardware Transactional Memory (HTM) systems. The proposed model targets TSX, a popular implementation of HTM integrated in Intel processors starting with the Haswell family in 2013.An inherent difficulty with building white-box models of commercially available HTM systems is that their internals are either vaguely documented...
Efficient design of complex multiprocessor embedded systems requires fast technologies for early system cosimulation and evaluation. Host-compiled simulation has been proposed as an option for this purpose, since it enables accurately timed modeling at high simulation speeds. To achieve high accuracy, simulation technology has to consider internal details of the processing system, such as the modeling...
Non-blocking caches, which are commonly utilized in modern out-of-order processors, could handle multiple outstanding memory requests simultaneously to reduce the penalties of long latency cache misses. Memory level parallelism (MLP), which refers to the number of memory requests concurrently held by Miss Status Handling Registers (MSHRs), is an indispensable factor to estimate cache performance....
Broadcast operations (e.g. MPI_Bcast) have been widely used in deep learning applications to exchange a large amount of data among multiple graphics processing units (GPUs). Recent studies have shown that leveraging the InfiniBand hardware-based multicast (IB-MCAST) protocol can enhance scalability of GPU-based broadcast operations. However, these initial designs with IB-MCAST are not optimized for...
The system configuration is an import aspect of Integrated Modular Avionics systems. These IMA blueprints are configured based on ASSAC and ARINC653 standards by analyzing all the requirements. Application requirements, such as required memory, communication, period, deadline and execution time, are stipulated in the blueprint. Hardware resources are also described in the blueprint. Moreover, the...
Along with the increase of the level of complexity, integration and intelligence of missile weapon system, prognostics and health management technology (PHM) has gotten more and more attention and application. The technology has become the key technology of increasing the reliability, testability, maintainability and supportability of missile weapon system. Doubtless, the higher requirements are put...
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