The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
Isotropic conductive adhesives (ICAs) based on metal-coated polymer spheres (MPS) have shown high potential for low-temperature, high-throughput assembly of a transducer array on a substrate in ultrasound imaging applications. The process of bonding and subsequently dicing a transducer stack on a flexible substrate was evaluated. The bonding material was MPS-based ICAs containing a commercial epoxy...
Assembly process reliability for Optical Multi-Chip Modules (MCM) is studied and improved. In the optoelectronic (OE) chip assembly for the Optical MCM, the OE chip with Au stud bump is joined with Sn-Ag-Cu (SAC) soldered in a through-waveguide via on an organic substrate to obtain high optical coupling efficiency. Since solid-liquid diffusion of Au to molten SAC is rapid, and formation of brittle...
A technological multi-chip module with a large silicon interposer has been designed, manufactured and characterized for space and airborne applications. It stands for a reconfigurable advanced calculation device, for up to 10 Gbps data rate. The electrical targets are propagation losses less than 2 dB at 5GHz for the signal path across the interposer and its bumps, signal integrity with enough eye...
In this paper, we present the assembly process and an electrostatic actuation, detection, and tuning method of micro-glassblown wineglass resonators using an out-of-plane electrode architecture with controlled uniform capacitive gaps. This process is developed based on wafer-level deposition of a sacrificial layer on planar electrodes wafer to achieve a uniform electrostatic gap (<5µm). The materials,...
In this paper, we investigated the reliability test for Glass interposer. The test vehicle is assembled glass interposer with chip, BT substrate, and PCB. The structure of a glass interposer with two RDL on the front-side and one RDL on the backside had been evaluated and developed. Key technologies, including via fabrication, topside RDL formation, micro-bumping, temporary bonding, silicon and glass...
With the growing demand for mechanically flexible electrical systems and the increasing level of integration of electrical assemblies, hybrid build-ups combining polymer substrates and ultra-thin flexible silicon chips (system-in-foil) are getting more and more important. These systems need thin chips which maintain their functionality even in bent condition as well as reliable handling and assembly...
Interconnection technology based on anisotropic conductive film (ACF) has been selected to assemble a transducer array on a flexible substrate in ultrasound imaging applications. The process of bonding and subsequently dicing a transducer on a flexible substrate was evaluated. The results show good integrity of ACF interconnects in test samples undergoing the assembly process. The interconnects, composed...
This work presents integration of two chip-scale real-time aerosol impactor stages within a miniaturized cascade assembly for airborne particulate size segregation and mass concentration measurement. Impaction stages, each comprised of a MEMS resonant microbalance, an impaction micro-chamber and a number of micro-nozzles, all integrated on a single chip, are fabricated using a three mask micromachining...
In this paper, we investigated the assembly characterization for reliability test. The structure of a glass interposer with two RDL on the front-side and one RDL on the backside had been evaluated and developed. Key technologies, including via fabrication, topside RDL formation, micro-bumping, temporary bonding, glass thinning and backside RDL formation, were developed and integrated to perform well...
Glass interposer is proposed as a superior alternative to organic and silicon-based interposers for 3DIC packaging in the near future. An excellent dielectric material and could be fabricated with large size, the several attractive advantages such as excellent electrical isolation, better RF performance, better feasibility with CTE and most importantly low cost solution. However, the thin glass is...
Silicon interposer has emerged as a substrate of choice for integrating fine pitch, high density devices. Conventional packaging of 2.5D/3D devices involves multiple level of assemblies. Normally, 2.5D/3D devices are first assembled on thinned silicon interposer with aspect ratio of 10:100 followed by second level assembly on a multi-layer organic build-up substrate. In this study we introduce direct...
This work presents the development of a highly integrated power switch, based on 70μm thin IGBTs and diodes rated at 600 V. The integration relies on advanced ceramic substrate technology, featuring double-etched patterned copper tracks for a fully bond-wire-less double-sided cooling packaging solution; viases are also used in the ceramic substrates for vertical current conduction, which enables the...
Self-assembly of CdS nanocrystals during evaporation of Langmuir-Blodgett matrix on the silica surface was investigated. Information about the size and spatial distribution of self-assembled nanocrystal ensembles were obtained using atomic force microscopy. It was found that matrix annealing temperature strongly affect self-assembly pattern. At annealing temperatures within the range of 175–200°C...
A flexible high-power solar array is described that combines the Photovoltaic Assembly (PVA - the solar cell blanket) with a deployable boom structure into a unified integrated laminated assembly - a Structural PVA. The deployable structural substrate provides effective shielding to thin, high efficiency solar cells while the PVA enhances the structural capability of the array wing. Design and analysis...
Thin silicon foils with two different crystal orientation were fabricated by SLiM-cut method. The thickness of the <100> and <111> foils are 45 µm and 33 µm, respectively. The surface quality was compared in this study. The <111> foil have smoother surface than the <100> foil. 4cm2 thin silicon solar cells with heterojunction structure were fabricated. The efficiency was found...
Bond-Via-Array (BVA™) technology has been developed to address the high density interconnect requirements of the next generation of package-on-package (PoP) solutions. This technology, while utilizing conventional assembly processes and equipment, can provide more than 1000 interconnections between the memory and the logic packages when stacked in a PoP format within a standard PoP package footprint...
In this paper, we conducted a new method to assemble microstructures inside a droplet named “Lab in a Droplet (LiD)”. The method can realize the assembly of micro-nano structures inside a droplet size. The surface tension is used to assemble microstructures automatically. Micro-scale or nano-scale objects are ejected from an inkjet nozzle. They are gathered at the center of the droplet and assembled...
This paper reports on the Buckled Cantilever Platform (BCP) that allows the manipulation of the out of plane structures through the adjustment of the pitch angle using thermal bimorph micro-actuators. Due to the micro-fabrication process used, the bimorph actuators can be designed to move in both: Counter Clockwise (CCW) and Clockwise (CW) directions with a resolution of up to 110 µm/V, with smallest...
Graphene has been widely studied because of its high mobility, superior mechanical properties and excellent thermal and chemical stability. This paper describes a novel and flexible method to fabricate graphene interdigitated electrodes and all-carbon field effect transistor (FET). In this approach, graphene is first grown by chemical vapor deposition (CVD) and assembled onto a microelectrode chip...
In recent years, the wafer nodes of semiconductor are getting smaller and narrower. In the view of the development trends in the semiconductor & semiconductor packaging technologies, the higher signal LO pin counts and thinner package are wide-spread applied on consumer electronics products (ex: Smartphone, Tablet devices or Digital cameras) as well as high performance network systems and high-end...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.