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Large-scale systems with arrays of solid state disks (SSDs) have become increasingly common in many computing segments. To make such systems resilient, we can adopt erasure coding such as Reed-Solomon (RS) code as an alternative to replication because erasure coding can offer a significantly lower storage cost than replication. To understand the impact of using erasure coding on system performance...
The emergence of large-scale dynamic sets in real applications creates stringent requirements for approximate set representation structures: 1) the capacity of the set representation structures should support flexibly extending or reducing to cope with dynamically changing of set size; 2) the set representation structures should support reliable delete operation. Existing techniques for approximate...
Parity declustering is widely deployed in erasure coded storage systems so as to provide fast recovery and high data availability. However, to perform scaling on such RAIDs, it is necessary to preserve the parity declustered data layout so as to guarantee the RAID performance after scaling. Unfortunately, existing scaling algorithms fail to achieve this goal so they can not be applied for scaling...
With the development of cloud computing, disk arrays tolerating triple disk failures (3DFTs) are receiving more attention nowadays because they can provide high data reliability with low monetary cost. However, a challenging issue in these arrays is how to efficiently reconstruct the lost data, especially for partial stripe errors (e.g., sector and chunk errors). It is one of the most significant...
Perpendicular Spin-Transfer Torque (STT) MRAM is a promising technology in terms of read/write speed, low power consumption and non-volatility, but there has not been a demonstration of high density manufacturability at small geometries. In this paper we present an unprecedented demonstration of a robust STT-MRAM technology designed in a 2x nm CMOS-embedded 40 Mb array. Key features are full array...
The reliability of digital integrated circuits is becoming the primary design concern in advanced technology nodes. The accelerated transistor aging mechanisms, such as Bias Temperature Instability, reduce the noise margin of memory cells leading to increased failure rate. Traditionally, error correction codes, such as Hamming code, are widely used to detect and correct transient errors in memory...
Highly reliable Physical Unclonable Functions (PUF) based on 28nm Split-Gate MONOS (SG-MONOS) embedded flash memory is developed for hardware security applications. In this paper, we investigate wide range tolerance on applied voltage, temperature and aging influence for basic PUF characteristics utilizing SG-MONOS initial Vt variation. High-temperature stable PUF at the junction temperature (Tj)...
Let G be a network with node set V and link set E, where each link e in E is associated with capacity c(e) and failure probability p(e). Let D=(s, t, d) be a flow demand on G which requests that a video stream of bit rate d should be delivered from source node s to sink node t through network G. The reliability of network G with respect to flow demand D is the probability of surviving a subgraph of...
For critical aerospace applications that experience a high intensity of single event upsets, the cache of a processor has to be protected against soft errors. This poses a challenge for cache design, since implemented redundancy causes timing and performance degradation of a processor. Sound design decisions should be made based on evaluations at every design stage. In this paper we present a platform-oriented...
While technology scaling enables increased density for memory cells, the intrinsic high leakage power of CMOS technology and the demand for reduced energy consumption inspires the use of emerging technology alternatives as Non-Volatile Memory (NVM) including STT-MRAM, PCM, and RRAM. However, their narrow resistive sensing margins exacerbate the impact of Process Variations (PV) in high-density NVM...
As Solid State Drives(SSDs) have becomemore cost effective, they are widely used from embeddeddevices to enterprise storage systems. However, they have typical problem called write amplificationwhich is caused by out-of-place updates characteristicsof NAND flash memories. As the write amplificationincreases, it degrades I/O performance andreduces lifetime of SSDs. When using SSDs in a paritybased...
In this paper we present an overview of important features for reliable and manufacturable ST-MRAM as well as new results in two areas: pMTJ arrays with data retention sufficient for programming before 260°C wave solder, and performance of a 256Mb, DDR3 ST-MRAM product chip.
Magnetic disk capacities have grown over the last decades by a factor of at least ten thousand. While the minicomputer disk drives of the late eighties could only store 600 MB of data [5], 8TB or 10TB disk drives are common today. The same is not true for disk transfer rates: they are just one hundred times higher than those of the late eighties. As a result, copying the entire contents of a disk...
We study the reliability of open and close entanglements, two simple data distribution layouts for log-structured append-only storage systems. Both techniques use equal numbers of data and parity drives and generate their parity data by computing the exclusive or (XOR) of the most recently appended data with the contents of their last parity drive. While open entanglements maintain an open chain of...
The use of Solid State Drives (SSDs) has been increased in storage systems due to high performance and low power consumption. However, some inherent properties of SSDs result in different behavior for SSDs in comparison with Hard Disk Drives (HDDs). As an inherent property, the Bit Error Rate (BER) of SSDs increases, when the number of Program/Erase (P/E) cycles arises. This increment leads to two...
In large scale data centers, with the increasing amount of user data, Triple Disk Failure Tolerant arrays (3DFTs) gain much popularity due to their high reliability and low monetary cost. With the development of cloud computing, scalability becomes a challenging issue for disk arrays like 3DFTs. Although previous solutions improves the efficiency of RAID scaling, they suffer many problems (high I/O...
The systematic polar codes under successive cancellation list (SCL) decoding suffers from very high time and space complexity when list size becomes larger. Aimed at getting the tradeoff between error performance and algorithm complexity, a practical CRCs-ADSCL(Adaptive SCL) decoding scheme is proposed for systematic polar codes, in which CRC values will be held by the bit-pair arrays in the decoding...
The unique tail bits retention failure behavior is observed in the RRAM array. Unlike the previous reports on single device or the average value''s retention behavior, quick retention loss of tail bits is found for both LRS and HRS. By statistically characterized such relaxation effect of tail bits, physical models are built to quantitatively describe the relaxation behaviors of LRS and HRS. The correlation...
Radiation-induced soft errors are a major reliability concern in circuits fabricated at advanced technology nodes. Online soft-error vulnerability estimation offers the flexibility of exploiting dynamic fault-tolerant mechanisms for cost-effective reliability enhancement. We propose a generic run-time method with low area and power overhead to predict the soft-error vulnerability of on-chip memory...
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