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Circuit/system level simulations are employed to assess the performance of a 10 Gbps transmitter for a high speed serial interface to be used in automotive Electronic Control Units. The transmitter has been designed in a standard 28 nm technology and features feed-forward equalization (FFE) with 8 taps (1 pre- and 6 post-cursors), whose strength is programmable with 16 discretization steps. It is...
This work describes the design of a transmitter for a 10 Gbps serial interface to be used in automotive Electronic Control Units. The data rate is chosen in order to assess the design challenges in automotive environment at this frequency. The focus will be mainly on challenges related to transistor level design using a standard 28 nm technology, nevertheless a system level overview will be also given...
In this work, we describe the implementation of a pulse-holding Time-to-Digital Converter (TDC) on a Xilinx Spartan 6 FPGA. We describe the operation of a pulse-holding TDC and we compare it with that of a pulse-shrinking TDC, which is the most similar TDC in the literature. We then illustrate a Simulink model of a pulse-holding TDC and the TDC that was implemented on a FPGA. The pulse-holding TDC...
In this paper we report some observations on the resolution and tones of First Order Noise Shaping Local-Oscillator Based Time-to-Digital Converters (LO TDCs). We describe the architecture and governing equations of the LO TDC. We introduce equations to predict the resolution of the system “LO TDC plus moving average filter” and the frequency and amplitude of the largest amplitude tone in the spectrum...
In this paper we introduce the architectures of TDC- and accumulator-based ADPLLs. Then, we briefly describe the block and timing diagrams of Gated-Ring-Oscillator-based and Local Oscillator-based TDCs. We present the governing equations of both TDCs and we calculate the resolution of the “first order noise shaping TDC plus moving average filter” system. We show briefly the effect of the phase error...
This paper presents a First Order Noise Shaping Local-Oscillator Based Time-to-Digital Converter (LO TDC). The architecture and governing equations of the LO TDC are described. In order to show the effect of noise shaping on the resolution of the TDC, the system “LO TDC plus moving average filter” is introduced. An equation to predict the resolution of the system “LO TDC plus filter” is given. Then,...
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