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With wafer fabs running at near full capacity, it is a constant challenge to maintain high yields. Many different products are fabricated by the same equipment. So the sudden change in product yield, a yield excursion, can have a significant impact to many different products. Therefore, it is critical to detect an excursion as early as possible and fix the cause in order to minimize the impact. This...
An analytics process is subjective to the perspective of the analyst. This paper presents a learning approach that models the process of how an analyst conducts analytics. The approach is applied in the context of correlation analysis for production yield optimization. The benefit is demonstrated by showing that learning from resolving a yield issue for one automotive product line can help resolve...
With VLSI scaling, “no trouble found” or NTF field returns have increased due to the dominance of soft defects over hard defects. An analysis of networking and DSP NTF field returns shows outlying behavior in not only product parameters but also on-die process parameters revealing new mitigation opportunities. The resulting yield hit is demonstrated to be minor <0.5% to catch NTFs that can be >50%...
This work presents a novel yield optimization methodology based on establishing a strong correlation between a group of fails and an adjustable process parameter. The core of the methodology comprises three advanced statistical correlation methods. The first method performs multivariate correlation analysis to uncover linear correlation relationships between groups of fails and measurements of a process...
Univariate outlier analysis has become a popular approach for improving quality. When a customer return occurs, multivariate outlier analysis extends the univariate analysis to develop a test model for preventing similar returns from happening. In this context, this work investigates the following question: How simple multivariate outlier modeling can be? The interest for answering this question are...
This work presents three pattern mining methodologies for inter-wafer abnormality analysis. Given a large population of wafers, the first methodology identifies wafers with abnormal patterns based on a test or a group of tests. Given a wafer of interest, the second methodology searches for a test perspective that reveals the abnormality of the wafer. Given a particular pattern of interest, the third...
This work studies the potential of capturing customer returns with models constructed based on multivariate analysis of parametric wafer sort test measurements. In such an analysis, subsets of tests are selected to build models for making pass/fail decisions. Two approaches are considered. A preemptive approach selects correlated tests to construct multivariate test models to screen out outliers....
Burn-in is a common test approach to screen out unreliable parts. The cost of burn-in can be significant due to long burn-in periods and expensive equipment. This work studies the potential of using parametric test data to reduce the time of burn-in. The experiment focuses on developing parametric test models based on test data collected after 10 hours of burn-in to predict parts likely-to-fail after...
One of the challenges of functional test content optimization, in the context of performance validation, is to predict from a high level model an event of interest observed in either a detailed simulation or in silicon testing. This work uses peak power validation as an example to study the potential of using learning algorithms to uncover the correlations between the different levels of abstraction...
This talk will review several key challenges in design automation, including areas such as pre-silicon functional verification, design-silicon timing correlation, test cost and quality and describe data mining technologies to implement a prediction platform that provides unique solutions to cover these challenges. Results based on industrial cases will be discussed and other potential applications...
Novel test detection is an approach to improve simulation efficiency by selecting novel tests before their application [1]. Techniques have been proposed to apply the approach in the context of processor verification [2]. This work reports our experience in applying the approach to verifying a commercial processor. Our objectives are threefold: to implement the approach in a practical setting, to...
This paper studies the potential of using wafer probe tests to predict the outcome of future tests. The study is carried out using test data based on an SoC design for the automotive market. Given a set of known failing parts, there are two possible approaches to learn. First a single binary classification model can be learned to model all failing parts. We show that this approach can be effective...
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