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In the past several decades on-chip dimensions have scaled over 2000X, while dimensions on printed circuit board have scaled 4-5X. This modest scaling of packaging dimensions has severely limited system scaling. To address this, we have proposed a disruptive package-free integration scheme. We replace the traditional organic printed circuit board (PCB) with silicon interconnect fabric (SiIF) and replace...
2.1D package technology (chip on substrate) as a potential low cost solution for 2.5D silicon interposer package (chip on wafer on substrate), we develop here a panel type manufacture organic interposer (scheme 1). 2.1D technology focus on the production cost and the ball count range which defined by line/space. We presents the demonstration of high resolution photolithography semi-additive processes...
Solid state ammonium ion selective electrodes based on two kinds of electro conductive materials, copper and silver, had been successfully synthesized. First, polyaniline had been deposited on the surface of copper and silver by potentiostatic method and cyclic voltammetry respectively, and then ammonium ion selective film was coated on the electrode. The morphology of two kinds of electrodes was...
The fabrication of passive RF structures in the millimeter wave frequency range with conventional printed circuit technology is subjected to some disadvantages (available design rules, dimensional accuracy and tolerances) compared to ceramic circuit carriers. The here presented SPE (sequential pre etching) process technology allows a significant reduction of these disadvantages, without diminishing...
Packages of commercial Gallium-Nitride power semiconductors present increasingly small dimensions to enable low parasitic inductance, increasing the heat flux density of the package and the challenges associated with their thermal management. This paper compares between Printed Circuit Boards and Direct Copper Bonded as substrates for a Gallium Nitride based half-bridge from a thermal and reliability...
Nanostructured pristine lead sulfide and copper iodide semiconductor films as well as copper doped lead sulfide and iodine-enriched copper iodide layers were obtained on solid and flexible substrates via Chemical Bath Deposition (CBD) and Successive Ionic Layer Adsorption and Reaction (SILAR) methods. Crystal structures, optical, electric and thermoelectric properties of the layers have been studied...
In this paper, we propose a feasible and prospective method to prepare copper-coated ceramic substrate by using nano thermo-compression bonding technology. Nanoporous copper (NPC) can be prepared by dealloying of Cu-Zn alloy system in L-tartaric acid solution. By controlling the concentration of L-tartaric acid solution and dealloying temperature, NPC presents good homogeneity and open bi-continuous...
The plasma activation is a promised process to improve the bonding performance for materials pretreated with the plasma. In this study, the chips studded with gold bumps flipped-bonding onto alumina substrates using the thermal compressional bonding. To improve the bonding performance of gold bumps onto copper electrodes, both gold bumps and alumina substrates were pretreated to Ar/H2 plasma at 400...
With the rapid increase in the number of integrated circuits I/O, the traditional wire bonding package has been unable to meet the high I/O number of interconnection needs, flip-chip process can undoubtedly solve the high I/O number of miniaturization package problems, especially flip-chip plastic package can fundamentally meet the increasing number of pins, improve speed and high frequency performance,...
Silicon anodes, with an extreme high theoretical specific capacity of 4200mAh g−1 and proper stable plateau potential of 0.4V, are considered one of the most promising anode materials in rechargeable Lithium-ion batteries. However, the great structural and volumetric changes during charge/discharge cycles relating to poor cycling performance are still the most critical challenges limiting the breakthrough...
High bandwidth Package on Package (HBPoP) had be well used which replaced FCMAPPOP in high-end mobile products with its advantages of wide I/O counts, high performance and the better integration between application processor and stacked memory packages. The structure of HBPoP is utilized flip-chip technology with ball grid array (BGA) balls on the bottom package and connect top DRAM package with substrate...
For deep ultraviolet light emitting diodes (DUV-LEDs) packaging, the choice of substrate directly affected its performance and reliability. In this paper, a structure was proposed to promote thermal management and lifespan of DUV-LEDs by introducing the ceramic substrate with copper filled thermal hole. The AlN ceramic substrates with different number of copper filled thermal holes were fabricated...
In this work we present the performance of metallic (copper and aluminum) and graphene buckypaper based microstrip transmission lines and the comparison between these device configurations. The graphene buckypapers were deposited by a simple vacuum filtration method, leading to freestanding paper with 350 Dm thickness and diameter up to 1.2 inches. After deposition and drying, the graphene paper and...
In this study, we perform a top gate field effect transistor by using the integration of novel materials such as graphene as active channel and fluorinated graphene as dielectrics on flexible Polyethylene terephthalate (PET) substrate. These device shows high carrier mobility (∼969 cm2/v.s) at a drain bias of +0.5V. It shows good mechanical flexibility and electrical stability after bending measurement...
In this study, a comparison of the interfacial adhesion strength of Plasma Enhanced Chemical Vapor Deposition (PECVD) silicon nitride (SiN)/Cu and High-Density Plasma Chemical Vapor Deposition (HDP CVD) SiN/Cu was performed using the 4-Point-Bending (4PB) technique. Differences in critical energy release rate value Gc, which is an indicator of the interfacial adhesion strength, were observed. The...
Electrochemical migration (ECM) pose a high reliability risk to semiconductor devices. In this study, an ECM caused electrical failure case detail was shared, relevant electrical failure & ECM mechanism was also analyzed. To verify the failure mechanism discussed in this paper, ECM process was simulated on the same chip substrate. Besides, for the first time, the effect of chloride ion concentration...
In this study, we present an environmentally friendly and solution-based synthesis for copper nanowires (CuNWs) at a moderate process temperature. Transparent electrodes (TEs) are fabricated by spray-deposition and evaluated in terms of their electro-optical performance. Using ImageJ, the CuNW diameters are determined in an automated and reproducible way. Without any post-processing, the films show...
In this paper, graphene for SERS molecular sensors is reviewed along with a report of new innovations. Arrays of silver nanoparticles were selectively deposited on copper, on which discrete graphene domains had been synthesized. Closely spaced silver nanoparticles create strong local electric fields by means of laser induced plasmonic coupling. Signal intensity measured from Raman scattering of low...
A new DBC-based hybrid packaging and integration method is proposed in this paper. A multilayer power module is formed by a direct-bond-copper (DBC) and a window cutting printed circuit board (PCB). The SiC chips and PCB are placed and soldering on the DBC. Al bonding wires are used for connecting the chips and the PCB. A full SiC half-bridge power module is designed and fabricated in compact size...
A microwave power limiter based on three-pole microstrip filter is designed, fabricated and tested. In the device outer resonators are coupled through an inner resonator containing high-temperature superconducting film. Prototype of the device with central frequency 8.3 GHz and relative bandwidth 7% has insertion loss 3 dB in the open state and signal suppression not less 35 dB in the limitation state.
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