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Abstract-In this paper a new round robin algorithm proposed for reducing context switching and solution of large time quantum. In round robin algorithm is not applicable for real time operating system because more context switching and time quantum is not fixe. Basically my proposed algorithm for a soft real time operating system. Round robin CPU scheduling is not applicable for soft real time operating...
Recent work in the FPGA acceleration of molecular dynamics simulation has shown that including on-the-fly neighbor list calculation (particle filtering) in the device has the potential for an 80× per core speed-up over the CPU-based reference code and so to make the approach competitive with other computing technologies. In this paper we report on progress and challenges in advancing this work towards...
This work demonstrates a new integrated inverse class E amplifier circuit, employing a pHEMT switching device and fully integrated output network for pulse shaping. The circuit is particularly suitable for full integration, since it does not need any RF choke for biasing, and no DC blocking capacitor is needed between the switch and the output network parallel resonance circuit. The back plate capacitances...
This paper presents a wide intermediate-frequency (IF) bandwidth down-conversion double-balanced Gilbert-cell mixer design in a 0.13-μm CMOS process. The load stage of the mixer is implemented by an LC tank with switched capacitors to complete three selectable sub-bands to cover the desired wide IF band. Both the RF and LO ports are integrated with Marchand baluns for single-phase input consideration...
In this paper, we try to establish newly technique evaluating the bacterial behavior in micro channel. For this purpose, we fabricated line patterned PDMS chip and use these chip as micro channel. Line pattern was fabricated on F-template by nano imprinting system, and these patterns were transferred on polydimethylsiloxane (PDMS). Fabricated line pattern was evaluated by laser microscopy. And then...
This paper presents innovative driving method for the magnetically driven microtools (MMT) which is micrometer positioning accuracy by horizontally arranged permanent magnets. A piezoelectric ceramic is used to induce nanoscale vibration to the microfluidic chip to reduce the friction on the MMT. The enucleation process has been conducted by the dual arm MMTs. MMTs receive enough driving power supplied...
This paper deals with the design of CMOS sampling switch for ultra-low power analog-to-digital converters (ADC) in biomedical applications. General switch design constraints are analyzed, among which the voltage droop due to the subthreshold leakage current constitutes the major error source for low-speed sampling circuits. Based on the analyses, a CMOS sampling switch with leakage-reduction has been...
This paper present an efficient technique and mixed-level design of programmable generating accurate reference voltage. The technique comprises a second-order error feedback Σ-Δ modulators sequence, which is then smoothed by a second-order RC filter. An FPGA-based test platform for the 10-bit programmable reference is implemented for hardware realization to verify the proposed design approach. Experimental...
This paper reviews Network-on-Chip architectures with prioritization of selected data streams targeting runtime reconfigurable manycore systems. The common idea of these architectures is to minimize the latency of selected packet transmissions by either bypassing or parallelizing processing stages in routers or by using dedicated links bypassing complete routers. Potential classes of selected data...
An improved Dynamic, Partial and self reconfigurable interconnection network (Hybrid-2 Network) is presented for Dynamically Reprogrammable Resource Array (DRRA), which is a Coarse Grain Reconfiguration Architecture (CGRA). To justify the design decision, Hybrid-2 network implementation is compared against the possible implementations using Multiplexer, NoC, Crossbar and already published Hybrid-1...
This paper proposes the design of a 10-bit Segmented-Hybrid Digital Pulse Width Modulator (DPWM) featuring a counter with segmented delay lines and an tunable digital Proportional-Integral-Derivative (PID) controller for digital DC-DC converters using AMS 0.35μm CMOS process. On the basis of simulations, the proposed DPWM dissipates ~55% lower power than the Hybrid DPWM with small area overhead (~8%)...
The sample and hold amplifier plays an important role in the front end of an analog to digital converter. In this work, a low power, high resolution, and high speed sample and hold amplifier is presented. The architecture of the proposed mainly adapts the class A/B folded cascode amplifier with a gain boosting technique and a switch capacitor common mode feedback scheme. The performance comparisons...
In this report, localized mechanical stimulation method was proposed to investigate a single organelle functions. Intracellular nano-machine for a organelle and a cell function control were designed to stimulate a single organelle on mathematical model. The nano-structures for fundamental research were fabricated. It was measured that the width as 30 μm, the length as 150 μm, the height as 500 nm,...
This paper presents the systematic design approach of a low-power, medium-resolution, high-speed pipelined Analog-to-Digital Converter (ADC). The ADC is implemented in 180nm digital CMOS technology. The converter achieves signal-to-noise distortion ratio of 59.8 dB, spurious-free dynamic range of 89 dB and effective number of bits of 9.64-bits at sampling speed of 50MHz with an input signal frequency...
In this paper, a 3780-point FFT algorithm combining of Good-Thomas, Cooley-Tukey, and WFTA algorithm is presented and its hardware implementation by using shift rules based on the analysis of the finite word length effect is described. The simulation results show that the output SNR meets the requirement of TDS-OFDM system.
In this paper, we demonstrated an optical lithium niobate sensing chip (LNSC) by integrating an optical waveguide phase modulator and an evanescent field-based waveguide sensor on the same chip. The repeatable phase measurements based on a homodyne metrology are achievable by injecting evaporative ethanol (concentration: 95%) liquid onto the surface of sensing transducer. The proposed sensing chip...
System-on-chip (SoC) designs provide integrated solutions to challenging design problems in the telecommunications, multimedia, and consumer electronics domains. However, the communication subsystem gradually becomes a bottleneck of SoC as the technology of semiconductor has a great progress and complexity of system increased. Network-on-chip (NoC) can meet the distinctive challenges of providing...
An ac voltage regulating system of doubly Salient Electro-magnetic Generator has been performed in this paper. In order to maintain the high voltage 360VDC stable, the dual boost converter with fixed frequency PWM controlled is adopted. Three-phase dual buck inverter was adopted to output 115VAC/400Hz. the generating system configuration, control strategy of dual boost converter and three-phase dual...
In the mobile communications market, the homogeneity phenomenon of product's service appears. The paper combines the Technology Acceptance Model (TAM) and Switching Cost Theory to construct the Convert Selection Model about the mobile communication services for users, which mainly analyzed from five dimensions: perceived switching costs, differences in perceived usefulness, differences in perceived...
This paper analyzes Henan power circuit breakers with closing resistors operation. Selecting a typical substation as the research object, switching overvoltage and surge arrester energy absorption were simulated without the closing resistor. Measured through the field test verified the accuracy of the simulation. The relations between line length and over-voltage level was also analyzed. The result...
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