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The GMM classifier for pattern recognition has shown increased intention in many applications such as speaker verification and identification. Such classifier requires a large storage and complex processing units but improved in performances. The performances of the GMM and its hardware complexity are analyzed in this paper. FPGA-based hardware implementation of the Log-Add algorithm is presented...
Recently speaker recognition system became high interesting by researchers for both software and hardware solutions. Different technologies have been adopted to implement speaker recognition system that has performance with optimal time response with acceptable accuracy. Research progresses are going on to provide highly durable and precise recognition system that can be embedded into critical implementation...
Power electronics applications have become ubiquitous among electronic products today. As a consequence, a great increase on the demand of professionals by the industry has been observed. This has a direct consequence on the electrical and electronics engineering curricula, as they have to meet the requirements of an industry with an increasing number of products requiring power electronics solutions...
Reconfigurable hardware is now used in high performance computers, introducing the high performance reconfigurable computing. Dynamic hardware allows processors to devolve intensive computations to dedicated hardware circuitry optimized for that purpose. Our aim is to make larger use of hardware capabilities by pooling the hardware and software computations resources in a unified design in order to...
In this paper we examine the idea of implementing communicating sequential processes (CSP) constructs on a Java embedded chip multiprocessor (CMP). The approach is intended to reduce the memory bandwidth pressure on the shared memory, by employing a dedicated network-on-chip (NoC). The presented solution is scalable and also specific for our limited resources and real-time predictability requirements...
The paper proposes a method for locating design errors at the source-level of hardware description language code using the design representation of High-Level Decision Diagram (HLDD) models. The method is based on backtracing the mismatched and matched outputs of the system under verification on HLDDs. Experiments on a set of sequential register-transfer level benchmarks show that the method is capable...
Dual-core platforms are growing as a new industry trend as platforms with only one core cannot easily perform the diverse functions in current embedded system applications, such as smart phones. We establish an easy-to-use co-simulation dual-core virtual platform to validate the functionality of hardware and software jointly. In our platform, the hardware components are implemented by SystemC, and...
Reconfigurable Computing has been making inroads in the front-end digital signal processing systems deployed at radio telescopes around the world. The National Radio Astronomy Observatory (NRAO) at Green Bank has developed a signal processing system expressly for pulsar search and timing observations. These observations are among the most demanding experiments in terms of real-time computational and...
This paper present an efficient technique and mixed-level design of programmable generating accurate reference voltage. The technique comprises a second-order error feedback Σ-Δ modulators sequence, which is then smoothed by a second-order RC filter. An FPGA-based test platform for the 10-bit programmable reference is implemented for hardware realization to verify the proposed design approach. Experimental...
This paper presents a significantly improved strategy for accelerating the method calls in the REALJava coprocessor. The hardware assisted virtual machine architecture is described shortly to provide context for the method call acceleration. The strategy is implemented in an FPGA prototype. It allows measurements of real life performance increase, and validates the whole co-processor concept. The...
In this paper we show how a simple dataflow processor can be fully implemented using CλaSH, a high level HDL based on the functional programming language Haskell. The processor was described using Haskell, the CλaSH compiler was then used to translate the design into a fully synthesisable VHDL code. The VHDL code was synthesised with 90 nm TSMC libraries and placed and routed. Simulation of the final...
This paper describes an FPGA-based system capable of computing the distance of objects in a scene to two stereo cameras, and use that information to isolate objects in the foreground. For this purpose, four disparity maps are generated in real time, according to different similarity metrics and sweep directions, and then merged into a single foreground-versus-background bitmap. Our main contribution...
Supporting technology is really useful in control education. In fact, virtual instrumentation is one of these technologies that can offer new possibilities in education process. In this paper, we describe how designing, modeling, analyzing, and prototyping can be done using LabVIEW on intelligent control systems. For this, we report the projects actually developed at ITESM university in Mexico and...
In this paper, a 3780-point FFT algorithm combining of Good-Thomas, Cooley-Tukey, and WFTA algorithm is presented and its hardware implementation by using shift rules based on the analysis of the finite word length effect is described. The simulation results show that the output SNR meets the requirement of TDS-OFDM system.
As researchers push for Exascale computing, one of the emerging challenges is system resilience. Unlike fault-tolerance which corrects errors, recent reports suggest that resilient systems will need to continue to make progress on an application despite faults. A first step in developing a resilient system is to have robust, scalable system monitoring. The work described here presents a novel, minimally-invasive...
The most of the upcoming global satellite navigation system (GNSS) signals will be composite type. Composite satellite signals have unique spreading codes both for data channel and dataless (pilot) channel. The combination allows both data extraction for navigation and longer integration of pilot for better timing and thus positioning accuracy. The non-coherent and coherent collaborative tracking...
In order to detect the location of smoke in the Measuring System for Ground Shell Dispersion (MSGSD), presented an improved algorithm for the Background Subtraction. Focused on introducing design of the image detection algorithm. The results show that the system can quickly, accurately and effectively detect the location of the smoke.
The article proposes a new type of short-range wireless information transmission equipment. It is mainly composed of a transmitter and a receiver. The transmitter and the receiver all use the high integrated and high performance single chip solution. The transmitter is only composed of pure hardware. It features simple structure, stable performance and simple debugging. The receiver not only has simple...
This paper presents a cost-effective approach to design an embedded autopilot system for a 4-rotor aerial vehicle. The system is targeted for autonomous control research, and it consists of an onboard system and a ground station. The onboard system interfaces with the vehicle and provides data link for sensor measurements and control data. The ground station provides a user-friendly interface for...
The scale invariant feature transform (SIFT) is a very efficient algorithm to extract and describe distinctive invariant features from images, and usually applied for many image applications such as object recognition, robotic mapping, and navigation. In the SIFT computation, the complexity of the feature description is quite high. Hence, it is desirable to have an efficient VLSI architecture to compute...
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