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This study offers a fully automatic BBN-ANFIS-based model of online condition monitoring system for a resilient MEG using FPGA chips. A direct connection of a FPGA-ZedBoard with on-field sensors is proposed in this study. The design enables real-time concurrent measurements of MEG's fault diagnosis assessment by mean of a hybrid BBN and ANFIS based model. The BBN capable to form a consistent function...
In this paper, we present an on-sensor neuromorphic vision hardware implementation of denoising spatial filter. The mean or median spatial filters with fixed window shape are known for its denoising ability, however, have the drawback of blurring the object edges. The effect of blurring increases with increase in window size. To preserve the edge information, we propose a spatial filter that uses...
Reliability testing has become extremely important in modern electronics as the soft error rate has been increasing due to technology scaling. The testing must be controllable, generic, done before deployment, cheap, and fast. Even though fault injection is often the most appropriate solution considering these requirements, it is very time-consuming. This work proposes a hybrid fault injection framework...
We present a set of tools for digital design, integration and verification of mixed-signal Application Specific Integrated Circuits (ASIC) developed within our design team. We have chosen Python for the development of the tools. By drawing on Python's features we have developed tools targeting many steps required across a design flow: a) Complex digital blocks are auto-generated, where Python generates,...
Because the numerous nonlinear components and fiber interfaces are used in Module Multiple Converter (MMC), the HIL test of MMC with detailed EMT model and the full-scale interface is hard to be implemented. In recent years, this existing disadvantage caused the MMC controller hardware and software difference between the HIL test and real project. In this paper, a detailed EMT model of hybrid MMC...
This paper introduces a kind of simulation testing system scheme for train-borne controller and applies it to the simulation testing system of the controller. Besides, it elaborates the system structure, interface type and key module of the hardware realization. The simulation testing system for train-borne controller is completely built, and plays a vital role in the train-borne controller simulation...
A prototype of the framework AutoFault, which automatically constructs fault-injection attacks for hardware realizations of ciphers, is presented. AutoFault can be used to quickly evaluate the resistance of security-critical hardware blocks to fault attacks and the adequacy of implemented countermeasures. The framework takes as inputs solely the circuit description of the cipher and the fault(s) and...
This paper provides a proof-of-concept demonstration of the potential benefit of using logical implications for detection of combinational hardware trojans. Using logic simulation, valid logic implications are selected and added to to the checker circuitry to detect payload delivery by a combinational hardware trojan. Using combinational circuits from the ISCAS benchmark suite, and a modest hardware...
Digital Logic course and Computer Composition Principle course are important professional basic courses of computer major. In the traditional teaching mode, the experiments of these two hardware courses are mainly implemented to validate the theoretical knowledge by plugging wires in different experiment boxes, which leads to a lack of computer system design and development capability of computer...
We design a multilevel data encoder for digital communication systems. Time constraints are imposed for a lot of services provided on portable devices. Hardware solutions are preferred more than software algorithms when the processing time and the power consumption are critical. Powerful error-correction coders processing multi-bit symbols can be implemented as hardware solutions in order to reduce...
Post-silicon validation is concerned for discovering design errors that escape to the silicon prototypes. Recent research efforts have shown how to reuse the constraints from pre-silicon verification to support post-silicon constrained-random validation. The objective is to subject the prototype to a large volume of random, yet functionally-compliant stimuli. In this paper, we present a new method...
Electronic circuits design is extremely important in information processing or communication systems. Classical design method of electronic circuit is manual programming. The cost of design and test is usually expensive, especially for large scale or complicated circuits. In this paper, hardware circuit is designed by formal method. Behavior of the circuit is described by multiple extended hierarchical...
Recently, based on different error functions, a series of continuous-time Zhang dynamics (CTZD) models have been developed by Zhang et al to solve for time-varying square root. For completeness and also for potential digital hardware implementation, this paper further investigates the discrete-time forms of these CTZD models, which are termed as the discrete-time ZD (DTZD) algorithms. Specifically,...
Distributed Energy Resources (DER) connected to distribution grids through static power converters may have major impacts on Power Quality (PQ). For this reason, power converters used as Universal Compensators (UC) are gaining more and more interest. This paper describes the design, modeling and study of a shunt static compensator for Low Voltage distribution grids. The proposed device can be used...
This paper describes the development of an advanced locomotive simulator for educational purposes. First, an overview of currently existing locomotive simulators is made. Next, requirements for the simulator are specified with the aim of significantly improving the reality of the simulation itself. Based on these requirements a modular system is developed. This system allows the use of common modules...
Analog-to-digital converters (ADC) in switching mode are used to convert the signals from multiple sources of the ADC means. It was considered appropriate, since it was believed that this provides a significant simplification of the hardware. Today, the advantage of hardware saving is negligible in compare with the loss of measurement accuracy because of the use of switching mode, which is unreasonably...
Operational Amplifiers are widely used for implementing simple and complex electronic circuits in electronic engineering. As a contribution to improve the way this integrated circuit is included in electronic engineering courses' curricula, this paper presents a prototype of an educational kit comprising a simulation tool and a reconfigurable hardware platform with the OpAmp uA741. It enables the...
Visual saliency models are difficult to implement in hardware for real time applications due to their computational complexity. The conventional digital implementation is not optimal because of the requirement of a large number of convolution operations for filtering on several feature channels across multiple image pyramids [1], [2]. Here, we propose an alternative approach to implement a neuromorphic...
An openly available simulator is presented here, which can be used to design, characterize and simulate circuits including floating gate (FG) components and larger systems building upon these elements, while measuring the silicon data too from the Field Programmable Analog Array (FPAA), incorporated within the same tool infrastructure. A single system for simulation as well as obtaining experimental...
Lowering the power supply of a circuit can induce transient errors in the memory cells and timing errors in the computation units. In this paper, we consider the Taylor-Kuznetsov (TK) memory architecture with transient errors in the memory cells and with timing errors in the correction circuit. We provide a theoretical analysis of the performance of TK memories under transient errors and timing errors...
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