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To eliminate the worst-case timing margins, a 13-transistor holosymmetrical transition detector (HTD) is proposed for use in timing variation resilient systems. The HTD achieves low overhead and wide-voltage-range operation via monitoring the discharge at the floating node of two-stage CMOS inverters. Using local detection and global clock stalling, the system is stalled immediately for one cycle...
This paper deals with the voltage and frequency restoration problem for a droop controlled islanded microgrid (MG). A consensus based distributed control is proposed for voltage/frequency restoration of MG which allows all the distributed generator (DG) unit voltage magnitude and operating frequency to converge to the nominal values even with different communication topologies. The proposed control...
This paper proposes a power-efficient capacitor-array-based digital-to-time converter (DTC) using a constant-slope approach. Fringe-capacitor-based digital-to-analog converter (C-DAC) array is used to regulate starting supply voltage of the constant slope fed to a fixed threshold comparator. The proposed DTC consumes only 15 μW from a 1V supply, while achieving fine resolution of 103 fs when running...
With the rapid development of hardware and the improvement of control performance requirements, digital control is widely used in power electronics. And due to the mature analysis methods and convenient implantation, the traditional linear control strategies, such as PID control, are directly applied to the design of digital controllers in industrial application. However, as the control delay and...
This paper proposes a Zero-Voltage Ride-Through (ZVRT) method and an LCL filter optimization design method to meet the Fault Ride Through (FRT) requirements for a singlephase grid-tied inverter with a minimized LCL filter. The inverter output current overshoots at a voltage sag when the small LCL filter is used. As a proposed method in this paper, the inverter output current overshoot is suppressed...
The present work proposes a self-bias compensation technique for the frequency supply voltage dependence in low cost charge/discharge oscillator topologies. The main bias current of the oscillator will include a supply voltage dependent current. The main goal is to reduce the supply voltage dependence for a range between 1.6 and 2V, for a current starved ring oscillator and a new charge/discharge...
The resonance problems may arise among multi-connected LCL-filtered inverters and make the system instable. The recently proposed GSPWM can reduce the filter order without reducing other performance in large-scale application, which has potential to avoid the resonance. But GSPWM will introduce specific phase delay to PWM sequences and it may influence the response character in different grid conditions...
This paper presents a time-delayed model predictive control for power converters used in vehicle to grid and grid to vehicle systems. Finite-based model predictive control has proven to be an alternate digital control method for power converters. However, there are some real-time implementation issues, including specifically time delay, that have to be addressed in order to achieve the system reliability...
The transition effect ring oscillator (TERO) based true random number generator (TRNG) was proposed by Varchola and Drutarovsky in 2010. There were several stochastic models for this advanced TRNG based on ring oscillator. This paper proposed an improved TERO based TRNG and implements both on Altera Cyclone series FPGA platform and on a 0.13um CMOS ASIC process. FPGA experimental results show that...
In this paper, a kind of networked control of power-sharing for inverter parallel operation is presented. To increase the participation of communication and improve the system performance, both autonomous mode and master-slave of communication mode in networked control are investigated. Nevertheless, communication actions may bring some unpredictable outcome due to the negative factors such as time-delay...
The Stability issues in PHIL simulations has always been of major concern due to the inherent delays within the interface devices. Various control algorithms are proposed in literature to overcome this problem. The paper uses a simple filtering technique followed by compensation blocks to overcome the stability problem. This paper further proposes a mathematical approach to consider the stability...
In railway traction applications, due to the limitation of switching frequency and the attempt to fully utilize the DC-link voltage, the traction inverters usually work in six-step (or quasi-square-wave) mode under heavy load or high frequency condition. Meanwhile, DC-link voltage fluctuation, stemming from a common single-phase grid-side power supply, has a great impact on the drive system. To maintain...
An improved deadbeat plus plug-in repetitive control scheme is proposed for grid-connected three-phase four-leg inverters to achieve fast and accurate feed-in grid current tracking. Discrete-time mathematical model of the three-phase four-leg grid-connected inverter is developed. An improved deadbeat (DB) plus plug-in repetitive control (RC) scheme is proposed to reject periodic disturbances while...
This paper shows the circuit level performance comparison of low-κ and high-κ spacer Junctionless FinFET(J-FinFET). TCAD simulations show that for high-κ (HfO2, κ=22) spacer J-FinFET, the device performance parameters such as DIBL (drain induced barrier lowering), SS (sub-threshold swing) and ION/IOFF improved by 14.5 %, 5% and 3.5x respectively as compared to low-κ (SiO2, κ=3.9) spacer J-FinFET....
In photovoltaic grid-connected inverter based on the deadbeat current control, the filter inductance variation and one-step-delay control affect the distortion of the grid current, stability and dynamic of the system. In this paper, a fast robust PWM method for photovoltaic grid-connected inverter is proposed, which reduces the distortion of the grid current caused by the filter inductance variation,...
A ring oscillator physical unclonable function (RO PUF) is an application-constrained hardware security primitive that can be used for authentication and key generation. PUFs depend on variability during the fabrication process to produce random outputs that are nevertheless stable across multiple measurements. Unfortunately, RO PUFs are known to be unstable especially when implemented on an Field...
This paper introduces a control method for Reverse-Conducting (RC-)IGBTs which reduces the control dead time of RC-IGBT inverters. Switching measurements with 6.5 kV RC-IGBTs concerning the applicability of the introduced control method and the effect of a load current direction change during the desaturation pulse are presented.
Logic gates for ultra-low voltages suffer from speed and robustness degradations, which are highly associated with the process technology. In this work a methodology for the automated design-space exploration of standard logic gates for a 28 nm FD-SOI technology is shown. Comprehensive design space explorations of inverter and nand2 gates show the benefits of back-biasing at sub-threshold supply voltages...
Grid synchronisation plays a vital role in grid tied inverters where the phase, frequency and voltage amplitude of grid is a critical information. In order to extract this information accurately, an improved technique of single-phase synchronous reference frame phase locked loop (SRF-PLL) is used in grid tied inverters. This method uses a transport delay block and a changed Park transform in such...
400 Hz inverters, known as Ground Power Units (GPUs), are widely used in aviation and marine industry. Due to their approximately eight times higher fundamental frequency, 400 Hz inverters are much more sensitive to practical delays such as sampling delays, when compared to traditional 50–60 Hz inverters. Conventional controllers designed for 50–60 Hz inverters, therefore, must be redesigned to properly...
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