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The cryptographic chip is widely used in government, military, finance, business and other fields, so the requirement of security is very high. The globalization of the integrated circuit supply chains has promoted the rapid development of the industry, but the chip is also vulnerable to malicious modified by the attacker, namely hardware Trojan implanted. The paper proposed a hardware Trojan efficient...
The iterative property of inverse butterfly permutation network makes it possible to implement shift operation with simple routing algorithm, which has high application value in cryptography, digital image processing and other fields. Based on the inverse butterfly network, this paper proposes a subword shift unit, which integrates the operations of subword rotation shift, subword logical shift and...
Nonlinear dynamics and chaos contribute flexibility and rich, complex behavior to nonlinear systems. Transistors and transistor circuits are inherently nonlinear. It was demonstrated that this nonlinearity and the flexibility that comes with it can be utilized to implement flexible, reconfigurable computing, and such approaches are called Nonlinear Dynamics-Based Computing. In nonlinear dynamics-based...
The Domain Name System (DNS) has evolved to support the exponential growth of the Internet, by relying heavily on a highly distributed infrastructure. Nevertheless, trust between server must exist in order to guarantee correct functioning of the system, which is prone to attacks and errors. The Domain Name System Security Extensions (DNSSEC) is the current extension of the DNS system to provide security...
Large number addition is the fundamental operation in cryptography algorithms. In this paper, we accelerate large addition in hardware design by introducing non-least-positive form, which is beneficial to parallel processing. An implementation of 256-bit signed array accumulator with our method shows an improvement of 18% in speed and 15% in area-delay product compared with traditional design.
In this paper, we propose two different hardware structure of SHA-3 hash algorithm for different width of circuit interface. They both support the four functions SHA3-224/256/384/512 of SHA-3 algorithm. The padding unit of our design is also implemented by hardware instead of software. Besides, a 3-round-in-1 structure is proposed to speed up the throughput of our circuit. We conduct an implementation...
We have proposed a method of designing embedded clock-cycle-sensitive Hardware Trojans (HTs) to manipulate finite state machine (FSM). By using pipeline to choose and customize critical path, the Trojans can facilitate a series of attack and need no redundant circuits. One cannot detect any malicious architecture through logic analysis because the proposed circuitry is the part of FSM. Furthermore,...
Use of digital token — which certifies the bearer's rights to some kind of products or services — is quite common nowadays for its convenience, ease of use and cost-effectiveness. Many of such digital tokens, however, are produced with software alone, making them vulnerable to forgery, including alteration and duplication. For a more secure safeguard for both token owner's right and service provider's...
Blockchain technology is being considered as one of the ultimate revolutions that will be able to disrupt several pillars of our society. It is a public and distributed ledger built for security and interoperability. Blockchain provides all parties a secure and synchronized record of immutable transactions assembled together and permanently stored with a fingerprint, creating therefore an irreversible...
Intellectual Property (IP) illegal copying is a major threat in today's integrated circuits industry which is massively based on a design-and-reuse paradigm. In order to fight this threat, a designer must track how many times an IP has been instantiated. Moreover, illegal copies of an IP must be unusable. We propose a hardware/software scheme which allows a designer to remotely activate an IP with...
Lightweight block ciphers are an important topic of research in the context of the Internet of Things (IoT). Current cryptographic contests and standardization efforts seek to benchmark lightweight ciphers in both hardware and software. Although there have been several benchmarking studies of both hardware and software implementations of lightweight ciphers, direct comparison of hardware and software...
As the Internet of Things (IoT) continues to grow, the need for lightweight cryptography intensifies. Research in this direction has presented us with novel encryption and hash algorithms that continue to decrease in circuit size at the cost of increase in execution time and relaxation in required security level. Perhaps the most resource constrained devices present in the IoT domain are RFID tags,...
We proposes the development of a cyber-secure, Internet of Things (IoT), supply chain risk management architecture. The proposed architecture is designed to reduce vulnerabilities of malicious supply chain risks by applying machine learning (ML), cryptographic hardware monitoring (CHM), and distributed system coordination (DSC) techniques to mitigate the consequences of unforeseen (including general...
Evaluating security vulnerabilities of software implementations at design step is of primary importance for applications developers, while it has received litte attention from scientific community. In this paper, we describe virtual prototyping of an implementation of scalar multiplication aiming to make it secure against simple side-channel attacks. Reproducing information leakage as close to reality...
The method for finding inverse element by the module is based on the stepwise addition of residue is developed in this paper. This method allows avoiding performing the complex arithmetic operations and implementing calculations on numbers much lower bit compared to the classical approach based on the Euclid's algorithm and its consequences. Analytical expressions of time complexity characteristics...
Novel applications demand computational resources that are provided by multiprocessor systems-on-chip (MPSoCs). At the same time, they increasingly process sensitive data and incorporate security-relevant functions like encryption or authentication. This paper discusses the implications of the MPSoC technology on security. It provides an overview of hardware-oriented techniques to enhance security...
This paper describes the outcome of a laser attack study on an Android smartphone targeting specifically the secure boot sequence. Laser fault injection has become a classical attack path in the secure chip industry to investigate potential security mitigation. The implementation of such attacks on a recent mobile phone remains relatively unexplored and represents different challenges, both at hardware...
System-on-Chips which include FPGAs are important platforms for critical applications since they provide significant software performance through multi-core CPUs as well as high versatility through integrated FPGAs. Those integrated FP-GAs allow to update the programmable hardware functionality, e.g. to include new communication interfaces or to update cryptographic accelerators during the life-time...
In this paper, we improved the method proposed in [1] which was designed to detect errors in the elliptic curve scalar multiplication algorithm (ECSM). The algorithm we propose is SPA-secure and safe against recent data and instruction cache timing attacks.
Systems-on-Chips (SoCs) are one of the key enabling technologies for the Internet-of-Things (IoT). Given the continuous distribution of IoT devices, data confidentiality and user privacy are of utmost importance. However, with the growing complexity of SoCs, the risk of malware infections and trojans introduced at design time increases significantly. A vital threat to system security are so-called...
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