The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
Decimal Arithmetic Hardware Research accelerated phenomenally in the last decade with introduction of Decimal Floating Point formats in IEEE 754–2008. ‘Addition’ being one of the primitive arithmetic operations has attracted numerous literary proposals involving the 8421 standard BCD code as well as nonstandard decimal digit representation codes (4221, 5211 etc.). This paper concentrates on Fixed...
In this paper, we introduce a new hardware platform that mimics a compound eye of an insect and propose an algorithm to detect objects using it. The compound eye camera has a wide viewing angle and simulates a number of single eyes on its hemisphere. Each single eye is an elementary unit to acquire visual inputs. Visual information from single eyes is hierarchically merged to estimate objectness....
This work presents a low-area scalable architecture for the Depth Modelling Mode 1 (DMM-1) encoder of the 3D High Efficiency Video Coding (3D-HEVC) standard, removing the refinement stage. This simplification causes a small BD-rate increase (0.09%) but a significant reduction in memory usage of 30%. The scalable architecture can support different block sizes. Synthesis results for ST 65 nm Standard...
Video coding has become widespread through mobile devices. At the same time, the adopted resolutions have been enlarged, demanding more coding efficiency and motivating the development of the new state-of-the-art standard, High Efficiency Video Coding (HEVC). However, to achieve the required efficiency the new standard greatly increased the computational intensity. That, allied to real-time constraints...
The increasing resolutions combined with storage and processing limitations of mobile devices point to the need for new compression techniques for video coding. Meanwhile, to achieve higher compression rates without compromising quality, the coding process becomes more and more complex. In reference software of HEVC the most time consuming step is the execution of Motion Estimation (ME), which is...
In this paper, the principle of normalized minimum-sum (NMS) polar decoding process is explored. It is demonstrated that with one properly chosen parameters for NMS algorithm, performances approach to that of the sum-product (SP) algorithm can be achieved. As well, the complexity reduction is realized by calculating a linear function instead of nonlinear function. Simulation results for successive...
Scientific simulations typically store only a small fraction of computed timesteps due to storage and I/O bandwidth limitations. Previous work has demonstrated the compressibility of floating-point volume data, but such compression often comes with a tradeoff between computational complexity and the achievable compression ratio. This work demonstrates the use of special-purpose video encoding hardware...
Reed-Solomon code or RS code is widely used for error corrections of data in transmission and storages. However, it is thought of as insecure for direct implementation in code-based cryptography due to plaintext-known attacks. In recent years, McEliece cryptosystem with enhanced public key security by generalized RS code and Goppa code are discussed for hardware implementation. In this work, from...
Efficient and robust wireless video delivery is an enabling technology for various applications. The existing wireless video transmission scheme has the cliff effect and it cann't gracefully adapt to channel variations. In this paper, we introduce a pseudo-analog wireless video transmission improvements and design in the hardware. Comparing with the traditional transmission, the linear processing...
Energy efficiency has become a primary concern in the design of multimedia digital systems, particularly when targeting mobile devices. Approximate computing is a highly promising approach to address this challenge. This paper presents an architectural exploration in a variable block size motion estimation (VBSME) architecture using imprecise Lower-Part-OR Adders (LOA). These adders were applied to...
Device-to-device (D2D) communication is widely used for mobile devices and Internet of Things (IoT). Authentication and key agreement are critical to build a secure channel between two devices. However, existing approaches often rely on a pre-built fingerprint database and suffer from low key generation rate. We present GeneWave, a fast device authentication and key agreement protocol for commodity...
Unpredictable value of carry bit in the summation of carry-sum is an annoying issue preventing carry-sum from being applied to designs with sign extension. In this paper, we propose a methodology to determine the carry bit of the carry-sum form output generated by Booth encoded multiplier without final addition. We discover that this carry bit is a constant "1" in traditional unsigned Modified...
Problem of telemetry and telecontrol data transmission systems noise immunity at endpoints implementing in the Internet of Things technology is considered. A method of improving streaming data encryption in open communication channels was proposed. The dynamic change of crypto key using non-linear feedback in shift register data and quasi-periodic reconfigure of the encoder / decoder device in data...
3D ultrasound (US) requires expensive transducers comprising thousands of elements and complicated hardware. This complexity originates from the classical idea on spatial sampling requirements for US imaging. The discovery of compressive sensing allows to ease this sampling constraint, enabling smarter ways of recording the required information. Inspired by this work we introduce a US imager that...
The features of weight-based sum codes for error detection in channel are discussed in this article. These features are acceptable for modification remote railway controlling systems such as locomotive signalization. In this article proposed the investigation for different coding modification algorithms, made an analysis of noise-immune properties when the modified Bauer code was replaced to modulo...
In this paper, we discuss the architecture exploration of a Neuromorphic Signal Processing Integrated Circuit using Precise Timing. This device is intended to fulfill the role of a Digital Signal Processor in the spiking domain, becoming an essential tool to Spiking Neuromorphic Sensors such as Dynamic Vision Sensors. Our approach is based on the use of Spiking Neural Networks with preset topology...
In this paper, a novel scalable and resource-efficient architecture capable of monitoring the compressibility of a data stream with various entropy encoding algorithms is proposed. The self-adaptive architecture determines the best compression technique among many techniques which may be selected to encode an online data stream. This information can be used to reconfigure an adaptive encoding architecture...
In this paper, a high speed digital excess loop delay (ELD) compensation scheme with hybrid thermometer coding is proposed. In this high speed compensation, the time constraint of the DAC feedback route is shifted to the one clock compensation path. Also, the method to deal with the signal overflows the quantizer's range is analyzed. Compared to other digital ELD compensations, this scheme features...
This paper proposes novel soft error detection and mitigation technique in reduced instruction set computer (RISC) based pipeline processors. We leveraged the data encoding techniques (re-computing with rotated operands (RERO)) in conjunction with back pressure controlling mechanism in pipeline architecture. In order to alleviate the performance degradation due to potential stalling, we exploited...
In this paper, the high throughput hardware architecture is designed to calculate the Sum of Absolute Difference (SAD) based on the variable block size of the image. Even though the fixed block size motion estimation is simple with respect to the complexity of the variable block size motion estimation, variable block size estimation technique results in exquisite performance. Motion estimation is...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.