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Through Silicon Vias (TSVs) are crucial elements for the reliable operation and the yield of three dimensional integrated circuits (3D ICs). Resistive open defects are a serious concern in TSV structures. In this paper, a post-bond, parallel testing technique is proposed for the detection and location of resistive open defects in TSVs, which is based on easily synthesizable all digital testing circuitry...
Through Silicon VIAs (TSVs) are critical elements in three dimensional integrated circuits (3D ICs). Various defects may occur during their fabrication process, the bonding stage or during their useful lifetime. In this work a testing method is suggested to detect the defects using a post-bond oscillation test scheme. Variations in the output signal's frequency are shown to detect the defects in TSVs...
This article describes the performance evaluation of a new wireless TCP algorithm in real environments, in order to identify the advantages and disadvantages of its operation. We evaluate the proposed wireless TCP algorithm with respect to generic TCP, considering an intrusive technique by using traffic injection. These tests were performed over point-to-point WiFi and WiMAX links in out-door and...
Testing of a system-on-chip (SoC) consists of a schedule of test sessions. In each session, a subset of cores of the SoC is tested such that the peak power consumption of each core as well as that of the entire SoC remain under specified limits. In this work, we assume that each test session can be assigned its own clock frequency and VDD, which are related through the critical path delay constraint...
A TSV in a 3D IC could suffer from two major types of parametric faults — a resistive open fault, or a leakage fault. Dealing with these parametric faults (which do not destroy the functionality of a TSV completely but only degrade its quality or performance) is often trickier than dealing with a stuck-at fault. Previous works have not proposed a unified test structure and method that can characterize...
This paper presents a proposal to express JTAG as an asynchronous packet-based protocol while maintaining full backward compatibility. This allows JTAG to transparently access remote units over high-bandwidth functional connections, a feature of special interest, for instance, in the environment of wireless telecommunication infrastructure and interfaces like CPRI or IP.
This paper, as a case study and tutorial, discusses testing methods for general PLL features and their operating margin. These methods can be applied all for analog-, digital- and PW-PLLs. There are various kinds of on-chip measurement macros which can be applied for the PLL testing, and for the direction toward digitally assisted analog circuit testing, it is shown that a digitally controlled variable...
Event processing queries are intended to process continuous event streams. These queries are partially similar to traditional SQL queries, but provide the facilities to express rich features (e.g., pattern expression, sliding window of length and time). An error while implementing a query may result in abnormal program behaviors and lost business opportunities. Moreover, queries can be generated with...
This paper proposes a novel scheme to manage capture power in a pinpoint manner for achieving guaranteed capture power safety, improved small-delay test capability, and minimal test cost impact in at-speed scan test generation. First, switching activity around each long path sensitized by a test vector is checked to characterize it as hot (with excessively-high switching activity), warm (with normal/functional...
Scan based at-speed testing has become mandatory in industry to detect delay defects today in order to maintain test quality and reduce test cost. However, the effects of power supply droop during test application often introduce timing uncertainty, such as clock stretch and additional gate delay. It leads to false failure and test escape during test and makes the application of the at-speed scan...
VoIP (Voice over Internet) provides delivery of voice information over unsecured IP-based networks like the Internet. VoIP data, signaling and voice, needs to be secured in such an environment. Security mechanisms take their toll on VoIP system performance. SIP is dominant signaling protocol for VoIP. This paper measures relative decrease in VoIP performance of system with secured SIP signaling over...
Inter contact time (ICT) between two mobile nodes is essential to forwarding algorithms and the end-to-end delay in Delay Tolerant Networks (DTNs). However, studies regarding the distribution of ICT lack general applicability and the exponential parameter concerns with too many motion characteristics. Consequently, it is difficult to design the protocol and analyze the performance for DTNs. In this...
This paper presents a Nonlinear AutoRegressive with eXogenous input (NARX)-based approach for human-emotion recognition from an input video. The dynamics of facial expressions are first captured by performing a temporal-spatial analysis by extracting local and spatial features using a pyramid of histograms of oriented gradients (PHOG) descriptor. Then the temporal phases of facial expressions are...
High-speed digital LSIs such as CPU, graphic processing LSI, and System-on-a-chip, are indispensable for all the today's consumer electrics. However, such today's high performance LSIs require careful debugging for timing related errors and high quality delay fault testing for the dependability. This paper presents time-multiplexed on-chip delay measurement to realize fast and high quality timing...
Mutation testing is a fault-based technique widely used for testing software. Particularly, it allows the effectiveness of a set of test data to be evaluated in terms of the ability to reveal faults. Nowadays, many industrial complex systems are more and more developed. Such systems require more testing activities to ensure a good quality. Simulink is one of the most popular tools to develop this...
We propose in this paper a new approach for conformance testing of WS-BPEL compositions. It is based on Timed Automata as model for testing WS-BPEL implementations, a distributed testing architecture and an algorithm for online test generation and execution. We also implemented our solution in the form of a prototype tool named WSCCT.
When digging paved ground, it is necessary to check in advance the location of buried pipes without damaging them. Ground-penetrating radar (GPR), which can be used for imaging without destroying underground structures, has been commonly used. However it becomes a burden for the user of GPR to visually check the location of the buried pipes from the signal received from a GPR. We have already proposed...
There has been significant interest in model based testing (MBT), in which testing is based on a model of the required behaviour of the system under test (SUT) or some aspect of this required behaviour. Most MBT approaches use statebased languages such as input output transition systems (IOTSs) (see, for example, [1]) or finite state machines (FSMs) (see, for example, [2], [3]). Given a model M, it...
This paper proposes a novel tweleve-phase PWM dimming control for backlight inverter. We adopt tweleve-phase or six-phase PWM dimming to control the brightness of twelve lamps. Each phase can control one or two lamps. Circuit architecture is full bridge phase-shift circuit which can improve the total efficiency of the driving circuit. From the experimental results for four-phase and six-phase PWM...
We propose in this paper, a robustness testing method of composite Web services. Our method aims to automatically test operations robustness which are provided by the involved Web services in the composition. Symbolic specification, used as a composition model is first translated into a symbolic execution tree that characterizes the execution paths followed during the symbolic execution. Then, from...
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