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Article deals with the problem of simulation modeling of robust control system for nonlinear plants with the input signal saturation, functioning under a priori uncertainty conditions and in the presence of several statement delays. With the help of computational experiments, the quality of the control system operation under various initial conditions of the controlled plant is illustrated.
In recent years, Hardware-In-the-Loop (HIL) simulation such as RT-LAB, RTDS are widely used in power electronic system study. In order to keep the simulation accuracy, the main concern of researchers normally focuses on the minimum simulation step size of the simulator, while neglects the role of input-to-output delay of the simulator. Concentrating on the study of hysteresis current control of grid...
This paper concerns the Discrete time Sliding Mode Control (DSMC) of complex system with input delay, the synthesized control law will be tested on a four tank hydraulic system. A predictor in discrete time is introduced to convert the original system with input delay to an equivalent system without the explicit appearance of time delay and makes the control problem solvable. Simulation studies show...
A multiple delayed model of HIV infection has been proposed in this paper. The first delay explains the time for an uninfected cell to become infected. This delay is termed as intracellular delay. The second delay known as the immunological delay describes the immune activation time. The basic reproduction number for the model has been given and the local stability analysis has been performed. The...
This work presents a study concerning the impact of Cloud Radio Access Network and virtualisation techniques in an operator's network, namely in terms of the necessary number of storage and processing nodes, and the links in between, taking increasingly network constraints into account (e.g., latency) as well as deployment ones (e.g., service area, deployment strategy, and expected proliferation of...
The carbon nanotube field-effect transistor (CNFET) is a potential candidate to replace MOSFET due to advantages offered by CNFET such as its superior electrical, thermal, and mechanical properties. When designing circuits made of CNFETs, additional features such as the CNT number, positions and pitch in the array of tubes creating a transistor channel must be considered for performance evaluation...
Multiplier is one of the major hardware circuits of microprocessor and high performance systems such as digital signal processor; FIR filters, processing operations like Convolution, Cross Correlation, and auto-correlation of discrete signals, digital Image processing applications such as edge detection etc. The major design constraint of multiplier is speed which is affected due to propagation delay...
In Wireless Sensor Networks (WSNs), energy conservation is one of the main concerns challenging the cutting-edge standards and protocols. Most existing studies focus on the design of WSN energy efficient algorithms and standards. The standard IEEE 802.15.4 has emerged for WSNs in which the legacy operations are based on the principle that the power-operated battery is ideal and linear. However, the...
The ability to estimate performance metrics such as latency (delay) at an early stage of final implementation in any embedded system is essential for efficient design specially realtime systems. Constructing performance models and evaluation techniques of a given system requires a significant effort. This paper presents a mapping scheme between a Functional Modeling Approach such as FSM, UML etc and...
This paper presents a new model for analysing delay propagation in a railway network and for distributing responsibility among different players. The model makes use of registered data about daily circulation. Starting from a simple hypothesis, an analytic instrument is inferred with the aim of attributing to each subject its part of responsibility, in terms of minutes of delay caused or propagated...
The design of wireless embedded systems needs their efficient and realistic simulation to verify that requirements are met. The reproduction of communication behavior is crucial to assess the performance of hardware and software components, e.g., dependability and energy consumption. This work presents and discusses different levels of abstraction for the simulation of the communication behavior....
Carbon Nano-Tube Field Effect Transistors (CNFETs) are considered to be a promising candidate beyond the conventional CMOSFET. It is due to their higher current drive capability, ballistic transport, lesser power delay product and better thermal stability. CNFETs specific parameters, such as number of tubes, pitch (spacing between the tubes) and the diameter of CNTs determine current driving capability,...
A lot of speech models emerge as human speech perception are more and more attention in recent years, especially which are built according to clinical trial data. DIVA (Direction Into Velocities of Articulators) is a clinical data model based mathematical model that can accurately describe the role of the human brain involved in speech production and speech understanding by the region, and simulate...
Closed-form model for the delay estimation of current-mode Resistance Inductance Capacitance (RLC) interconnects in VLSI circuits is presented. The existing Eudes model for interconnect transfer function approximation is extended and applied for further accurate estimation of delay. With the equivalent lossy interconnect transfer function, finite ramp responses are obtained and line delay is estimated...
In classical virus spread model, the virus spreading process is described by infected probability, this process ignored some spreading details and the duration of contact. For this reason, we proposed a delay included dynamic virus spreading model and simulated the viruses' spreading process by cellular automata method. The unexpected result shows that the individual's moving behavior can hinder the...
The support of delay-sensitive applications like VoIP, video conferencing, video streaming, etc. on scheduled mesh networks requires careful configuration of routing and scheduling. We formulate a delay-optimal joint routing and scheduling optimization problem that minimizes the maximum average delay perceived by any flow under the physical interference model. Due to the non-convex nature of this...
Continued scaling of bulk CMOS technology is facing formidable challenges. As an alternative, FinFETs offer a promising solution for the 22nm technology node and beyond though they still suffer from process, voltage, and temperature (PVT) variations. Thus, in order to analyze the delay of FinFET logic circuits, statistical static timing analysis (SSTA) is more suitable than traditional static timing...
This paper presents an I–V model for estimating the drain current of a sub-90nm MOSFET in the linear and saturation regions. The proposed model employs the dependencies of drain current on channel width and the gate voltage. It is the modification of nth-power law model introduced by Sakurai and Newton. Our model provides more accurate relationship between the channel length modulation and gate voltage...
Grid-shaped cellular models have gained popularity as an effective approach to understand physical systems. Despite their usefulness to describe complex behavior, many cellular models require large amounts of compute time, mainly due to its synchronous nature. Besides this, cellular models do not describe adequately most of existing physical systems whose nature is asynchronous. In this tutorial we...
Due to high packaging density of components, delay modelling is increasingly becoming the bottleneck for the design of high performance VLSI circuits. At higher frequency of operations, of the order of few GHz, the on-chip interconnect is to be analyzed with a distributed RLCG model. Because at very high frequency, the dielectric material deviates from its ideal nature. This gives rise to the shunt...
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