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High-density packaging of fast-switching power semiconductors typically requires low thermal resistance and parasitic inductance. High-density packaging of high-voltage semiconductors, such as 10 kV SiC MOSFETs, has the added challenge of maintaining low electric field concentration in order to prevent premature dielectric breakdown. This work proposes a wire-bond-less, sandwich structure with embedded...
The formation of a high temperature die attach based on transient liquid phase (TLP) bonding is demonstrated using the binary system Ag-Sn in a sputtered thin layer approach. The microstructure and shear strength are compared to a foil based approach and show the successful replacement of the Sn foil and thus a simplification of the stack assembly. The diffusion of the Ag-Sn system is investigated...
The RF performance of advanced silicon technologies has enabled the development of highly integrated wireless System on Chip (SoC) from 60 GHz up to the sub-THz spectrum. Leveraging wide bandwidths available at sub-THz frequency, data rates above 10 Gb/s have already been demonstrated. However, in order to develop highly integrated and cost effective silicon-based sub-THz wireless SoC we also have...
The demand of electronic device applications for high performance, minimization and cost effectiveness has driven the highly integrated semiconductor packaging development in recent years. Embedding die technology, which reduces package height and weight, increases the functionality and density, improves electrical and thermal performance and reduces the cost effectively, is particularly attractive...
Thermal dissipation is a major concern in microelectronics, especially for compact packages and 3D circuits where the dense stacking of thin silicon layers leads to a significant increase of heat densities. Direct hybrid bonding is considered as one of the most promising technologies for future 3D-ICs. Its face-to-face structure allows significant inter-connexion capabilities but it also implies increased...
Packages of commercial Gallium-Nitride power semiconductors present increasingly small dimensions to enable low parasitic inductance, increasing the heat flux density of the package and the challenges associated with their thermal management. This paper compares between Printed Circuit Boards and Direct Copper Bonded as substrates for a Gallium Nitride based half-bridge from a thermal and reliability...
This paper presents the use of innovative high-voltage SiC diode technology in the development of a user configurable full-wave or half-wave rectifier bridge. The devices are of merged Junction-Barrier-Schottky (JBS) type to enable for optimum performance even in the presence of current surges, as demanded by the application. To contain the cost of the proposed solution, their packaging relies on...
High-density packaging of fast-switching power semiconductors typically requires low parasitic inductance, high heat extraction, and high thermo-mechanical reliability. High-density packaging of high-voltage power semiconductors, such as 10 kV SiC MOSFETs, also requires low electric field concentration in order to prevent premature dielectric breakdown. Consequently, in addition to the usual electromagnetic,...
In this paper, a novel full-SiC power module suitable for three-phase Current Source Inverter (CSI) applications is presented. Based on state-of-the-art CSI modules, the problems associated with layout asymmetry are analyzed through electromagnetic (Finite Element Analysis software) and electrical simulations (Spice environment). Prototypes of the power module layouts are fabricated and parasitic...
As compared to piezoelectric technology, MEMS technology employed for Capacitive Micromachined Ultrasonic Transducer (CMUT) fabrication provides increased compatibility with 3D packaging methods, enabling the possible development of advanced transducer-electronics multi-chip modules (MCM) for medical imaging applications. In this paper, an acoustically optimized 3D packaging method for the interconnection...
Plastic package of integrated circuit has the advantages of excellent performance, light weight, small size, and outstanding mechanical properties, which can be widely applied to weapons and equipments, aerospace, and other important areas. Due to the thermal mismatch of CTE, the traditional substrate-type plastic package is more likely to have a series of failures such as delamination and warping...
In the phosphor coating process of the phosphor-converted light-emitting diodes (pc-LEDs) packaging, the phosphors settle spontaneously due to the density difference between the phosphor particles (YAG-04, about 4800 kg/m3) and the silicone matrix (OE6550 A/B, about 1120 kg/m3). The phosphor sedimentation affects the phosphor distribution and changes the optical performance of pc-LEDs, such as the...
The SnSbNi solder pastes were reflowed at 270°C and 280°C between the MvpLED chip and the AlN ceramic substrate, and then the SnSbNi solder joints were aged respectively at 200°C for 1h and at 250°C for 3h. The interfacial microstructure and constituents were investigated by SEM and EDS. After the reflow reactions, a thin layer of IMCs was formed at the chip/solder and solder/substrate interfaces,...
Thin silicon or glass interposer provide a way to highly integrated microsystems [1]. In this work, we present a novel wafer-level fabrication method of RF interposer applied in the integration of band pass filter in the frequency range of X band. In order to reduce the insertion loss caused by parasitic effects in the substrate, a special designed TSVs transmission structure (a core TSV and six shielding...
This paper presents the design of an on-chip patch antenna on indium phosphide (InP) substrate for short-range wireless communication at 140 GHz. The antenna shows a simulated gain of 5.3 dBi with 23% bandwidth at 140 GHz and it can be used for either direct chip-to-chip communication or chip-level integration and packaging. In the transmission frequency band from 130 GHz to 150 GHz the estimated...
The anisotropic behaviors of micro solder interconnects have been recognized as a crucial reliability concern due to the continuous trend of miniaturization in high-performance electronic devices. The hexagonal structure η-Cu6Sn5 with highly anisotropic phase structure has considerable influence on its growth behavior during soldering and performance in service. In the present work, synchrotron radiation...
Large scale and high density packaging of ASICs are usually achieved by FCBGA forms. The structure and materials are more complicated in FCBGA, which would cause reliability concerns in situations where thermo-mechanical stressing is dominant. Accelerated temperature cycling reliability test was performed on 90-nm/8-level copper based FCBGA packaging devices, and open failures dominated by thermo-mechanical...
A new DBC-based hybrid packaging and integration method is proposed in this paper. A multilayer power module is formed by a direct-bond-copper (DBC) and a window cutting printed circuit board (PCB). The SiC chips and PCB are placed and soldering on the DBC. Al bonding wires are used for connecting the chips and the PCB. A full SiC half-bridge power module is designed and fabricated in compact size...
Package lid is usually mounted above the integrated circuits (ICs) to protect the die and improve the thermal performance. However, the package lid may be an unintentional radiation contributor due to the resonance of package lid and package substrate. In this paper, based on a typical wire-bonded ball grid array (WB-BGA) package, perfect magnetic conductor (PMC) packaging is used to suppress the...
The tremendous growth in smartphones and tablets has been fueled by consumer demand for increased mobility, functionality, and ease of use. This, in turn, has been driving an increase in functional convergence and 3D integration of integrated circuit (IC) devices, resulting in the need for more advanced and sophisticated packaging techniques. In particular, the integration of the application processor...
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