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Presents a low offset current sensing circuit based on switched-capacitor, in which resistance sensing technique is used. Under the control of clock switch, the switched-capacitor integrator could feed the operational amplifier offset voltage back to major circuit as a negative feedback regulator periodically to reduce the influence from the offset to the output. It is shown in the HSPICE simulation...
The paper presents a 24 V chopper offset-stabilized operational amplifier with symmetrical RC notch filters, having a 4–24 V supply range, and being realized using a 0.25 ßm BCD process. The amplifier has a typical offset voltage of 1.2 μV, a minimum PSRR of 128 dB, a minimum CMRR of 120 dB, a minimum open-loop gain of 134dB, a noise PSD of 30 nV/√Hz, 1.8 MHz unity gain bandwidth, and THD + noise...
This paper presents the study, design and simulation of a laboratory module related to filters. With this laboratory platform it was accomplish a comparative study between current feedback (CFA) and voltage feedback (VFA). Because the laboratory platform has an educational role, it was presented some practical aspects of active filters measurement and also the differences between the measured values...
In power electronics, the compensators are required to shape the loop gain of the transfer function. The purpose of shaping the loop gain transfer function is to obtain a desired crossover frequency, phase margin and gain margin. The compensators can be constructed by the operational amplifier (op amp). There are a few commonly used compensators built up by the op amp, to be discussed herein. By using...
A new structure of the active RC low-pass filter (LPF) is proposed. This scheme is recommended as a second-order link in more complicated antialiasing filters and spectrum limiters in the input circuits of analog-to-digital converters. It is shown that in the low-pass filter under consideration an independent trimming of the main characteristics, such as a pole frequency, a pole attenuation, and a...
This paper presents a constant bandwidth switched-capacitor programmable-gain amplifier (SC-PGA). By using an adaptive Miller compensation technique for the SC-PGA, our SC-PGA achieves low power consumption and high linearity at various gain conditions. The post-layout simulation results with 0.18 μm CMOS process show that power efficiency is tripled over the SC-PGA without the adaptive Miller compensation...
The transfer function of fractional-order differentiators and integrators can be approximated through the utilization of appropriate integer-order transfer functions. Efficient tools towards this goal include the Continued Fraction Expansion as well as the Oustaloup's approximations. In this paper, the accuracy of the expressions derived through the various orders of these approximations, in terms...
A switched capacitor low-side current sensing signal conditioning circuit with high dynamic range is demonstrated in AMS 0.35 μm, 3.3 V CMOS process. The design incorporates a Switched Capacitor Programmable Gain Amplifier (SC-PGA) and multi-bit second order ΔΣ-ADC. The switched capacitor eliminates the need for explicit level-shifting and chopping circuits thus facilitating sensing of input signal...
High resolution pipelined Analog-to-Digital Converters (ADCs) exceeding 10-bits are thermal noise limited. Typically for low-power switched capacitor (SC) circuits, the thermal noise of the op amp is the dominant source of noise as compared to the switches. This paper proposes a thermal noise canceling technique for pipelined stages that cancels the thermal noise of the op amp. The technique involves...
This paper reports a new design of a low power two stage operational amplifier with Miller compensated topology for enhancing stability. The circuit is designed and simulated in Tanner EDA tool using 45 nm. CMOS technology. A significant reduction in power and enhancement of unity gain BW is achieved with a satisfactory phase margin. Several parameters are computed and compared with a few contemporary...
A switched capacitor low-pass filter employing folded-cascode CMOS OP Amps with a dynamic switching bias circuit capable of processing video signals, which enables low power consumption, and operation in wide band-widths and low power supply voltages, is proposed. In this filter, charge transfer operations through two-phase clock pulses during the on-state period of the OP Amps and a non-charge transfer...
In this paper a design of two-stage CMOS operational amplifier for sigma-delta ADC is presented, which operates at ±1.8 V power supply using 180 nm technology. This two-stage CMOS OP-AMP has been designed to indicate a unity gain frequency of 18.2MHz and indicates a gain of 71.27 dB. The design and simulation part has been done on Cadence Custom IC CAD. The simulated results are encouraging and has...
A three bit second order delta sigma modulator for audio applications implemented in 130nm CMOS technology is presented. The modulator features two integrators, a flash quantizer and two current steering DACs. In order to minimize the effect of delays in the DACs, excessive loop delay (ELD) compensation is utilized. Using an oversampling ratio (OSR) of 80, the design consumes 2.8mW and achieves a...
Recent years has seen a significant increase in the manifestation of harmful algal blooms. The cyanobacterial species, that is commonly present in freshwater bodies, is known to release a class of deadly toxins known as microcystin, which is a threat to humans and wildlife through consumption of contaminated water. Hence, there is a need for development of an efficient and reliable method to detect...
The new architectures of the high-speed operational amplifier (op-amp) based on the complementary folded cascodes (FCs), which form the intermediate stage of op-amp, are suggested. In the folded cascode the circuit techniques, excluding the traditional limitations of its output current, which recharges the balancing capacitor of op-amp, are provided. It increases the maximum slew rate of op-amp (SR)...
Rogowski coil has been applied widely in the field of lightning current measurement, because it has good linearity, no saturation phenomenon, as well as the electrical isolation between the primary side and secondary side. This paper mainly introduces three kinds of Rogowski coil applied in lightning current collection, and also analyzes and compares them with experiment. We can select the appropriate...
Using active feedback technique an analogue four quadrant multiplier-divider presented in this paper has achieved a great dynamic range both at inputs and at the output, and a good linearity with nonlinearity error smaller than 2%. Moreever the circuit has a better independence from the manufacturing process and the geometrical size of MOS transistors.
There has been a push for a greater number of channels in implantable neuroprosthetic devices; but, that number has largely been limited by current hermetic packaging technology. Microfabricated packaging is becoming reality, but a standard testing system is needed to prepare these devices for clinical trials. Impedance measurements of electrodes built into the packaging layers may give an early warning...
In this paper we have proposed a novel buffer amplifier to be used in LCD circuitry. The circuit is implemented on 0.18μm CMOS technology. The new high speed buffer shows the reduction in the value of settling time and also the power dissipation. The settling time of the output buffer for 1000 pF load is 0.94μs. The power consumption for this circuit is 50.89 μWatts. The gain of the new high speed...
This paper proposes a Mixed Integer Non-linearProgramming (MINLP) based optimization algorithm to designpower optimized pipelined ADC. For a given specification theproposed algorithm gives stage resolution and sampling capacitorper stage that minimizes the total power consumption. Closedform expressions of the power consumption of each stage werederived and used as objective function. Pipelined ADCs...
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