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This paper proposes the reconfigurable RX analog baseband transformer that supports multi-standard applications. The proposed ABB can transform its structure between a delta-sigma modulated ADC for narrow band and a baseband LPF for wide band with a simple switch configuration without extra cost. Thus, the ABB obtains efficiency in both size and power aspects. It occupies only 0.11mm2 of active area...
A 4.6–5.6 GHz constant KVCO LC-VCO applied in PLL frequency synthesizer is presented in this paper. With constant KVCO LC-VCO and programmable charge pump, the frequency synthesizer is able to obtain constant bandwidth. Furthermore, the VCO has a low KVCO which will result low phase noise. An Optimized automatic frequency calibrator (AFC) is proposed, the AFC can select the sub-band which is nearest...
The paper presents a 24 V chopper offset-stabilized operational amplifier with symmetrical RC notch filters, having a 4–24 V supply range, and being realized using a 0.25 ßm BCD process. The amplifier has a typical offset voltage of 1.2 μV, a minimum PSRR of 128 dB, a minimum CMRR of 120 dB, a minimum open-loop gain of 134dB, a noise PSD of 30 nV/√Hz, 1.8 MHz unity gain bandwidth, and THD + noise...
This work proposes a control linearization technique for a single phase 3 level-flying capacitor multi-level (FCML) inverter with multiple modulation strategies along the line period, based on the plant inversion. Multiple modulation strategies are used along the line cycle so that the overall size and efficiency of the converter are optimized. This benefit from the point of view of the energy processing...
We propose a plug-and-play realization of the virtual infinite capacitor (VIC), which is an electronic circuit recently proposed in the literature for DC voltage filtering. The VIC is meant to replace large, expensive and unreliable electrolytic capacitors, and is mainly intended for applications where random fluctuations of the DC bus voltage may occur (i.e., the VIC is not tuned to one particular...
A five-stage 93.9 GHz-105.6 GHz common-source CMOS amplifier is presented in this paper. The customized on-chip inductor and transmission line (TL) are designed for matching networks. Fabricated in a 65nm bulk CMOS process, this amplifier achieves a peak gain of 9 dB at 100 GHz and 11.7GHz 3-dB bandwidth range from 93.9 GHz to 105.6 GHz, consuming total power of 49.2 mW under 1.2 V voltage supply...
The equivalent circuit of square-loop-resonator (SLR) bandpass filter (BPF) with cross-shaped I/O coupling is investigated to be analyzed and compared with the 3D electromagnetics (EM) simulator result. The proposed SLR BPF is designed for X-band frequency application with the center frequency of 9GHz and the −3dB fractional bandwidth larger than 3%. The analysis method is carried out by separating...
This paper describes the investigation on relative bandwidth, frequency range and thermal properties of the high directivity planar couplers realized in microstrip line technology. The basic idea is that coupling structure is attached to two transmission lines at two points only. The coupling structure is realized using SMD capacitances and inductances soldered to the microstrip lines. Frequency limit...
Reference drivers for charge-redistribution SAR ADCs require significant area and/or power. In this work, a low-power and area-efficient passive reference-voltage driving scheme for charge-redistribution SAR ADCs is proposed. An on-chip decoupling capacitor is pre-charged to a reference voltage during tracking phase and utilized to drive the DAC passively during conversion. The reference-voltage drops...
A 12 b 600 MS/s 2 × TI SAR ADC achieving 60 dB SNDR at Nyquist is presented. Time-interleaving errors are calibrated in the background by using a linear but noisy reference ADC. A test chip demonstrates that interleaving spurs are reduced to below −70 dBFS using an off-chip least-mean-squares (LMS) algorithm. The reference ADC is an 8 b SAR with reduced sampling capacitance and input amplitude. This...
This paper brings novel first-order bilinear two-port section (also called as two-port block). New topology reduces complexity and minimizes impact of fabrication dispersion (tolerances) of passive elements on transfer features in comparison to previously reported solutions. Developed bilinear section was applied for arbitrarily equalized transfer response operating from tenths of Hz to hundreds of...
A Polyphase Filter (PPF) is a kind of complex filter that avoids generating image frequency in a heterodyne transmitter. Its properties allow to achieve required selectivity, difficult or even impracticable with real filters in integrated circuits. However, its performance is notably affected by non-idealities although some of the most important have not been thoroughly analyzed previously in literature...
A 28nm CMOS 1.2GHz full-duplex analog front end (AFE) is presented. The AFE can deliver 20Gbps of aggregate service across 50m of RG6 coax. The on-chip line driver, powered from a 7.2V supply and using core transistors, delivers 5.9Vptp differential to the line through the hybrid. A tunable capacitive hybrid circuit for full duplex operation is proposed for low noise performance and allows channel...
This paper presents a constant bandwidth switched-capacitor programmable-gain amplifier (SC-PGA). By using an adaptive Miller compensation technique for the SC-PGA, our SC-PGA achieves low power consumption and high linearity at various gain conditions. The post-layout simulation results with 0.18 μm CMOS process show that power efficiency is tripled over the SC-PGA without the adaptive Miller compensation...
The ever-increasing need for higher number of neural recording channels along with the stringent power and area requirements of a brain-implantable device, demand for ultra-compact and scalable channel architectures. In this paper, we will first briefly discuss the fundamental scaling issues of conventional AC- and DC-coupled neural front-ends. Next, we will analytically examine the feasibility of...
Output characteristics of phase module combined three-phase single-stage PFC converter based on full-bridge structure are analyzed in detail. The module combined three-phase single-stage PFC converter is the combination of three single phase full-bridge PFC converters, whose topology and operation principle are presented. Two times line frequency output voltage ripple under balanced and unbalanced...
A passive delta-sigma ADC with a voltage-controlled-oscillator (VCO) quantizer is presented. By employing the VCO quantizer, a single-bit quantizer is replaced with a multi-bit quantizer while an extra order of noise-shaping was provided. The proposed architecture does not need very large capacitors as compared to the conventional passive delta-sigma ADC. Furthermore, it also does not require external...
Teaching measurements means educating in making experiments. Unfortunately the human body is not equipped with the tools to sense electromagnetic quantities (in a wide range of frequencies) therefore students in physics, electronics and telecommunications engineering, have to rapidly become familiar with an entirely new world of probes, sensors and measuring instruments. Students have to learn how...
De-emphasis is a well-known signal conditioning technique that overdrives the rising and falling edges of the signal to compensate for the expected attenuation that these edges will incur as they propagate through long transmission lines. On the other hand, equalization is a different signal conditioning technique that can be used to extend the transmission bandwidth. Passive equalization, such as...
In this paper, a new electromagnetic jamming system (EJS) is presented to interfere with the signals of unmanned aerial vehicles (UAVs). In particular, the remote control and global positioning system (GPS) signals required for UAV flight are jammed by the EJS which leads to a loss of UAV control. A saw tooth wave is employed and the bandwidth and center frequency can be adjusted to satisfy different...
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