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This paper presents the subthreshold design of an ultra-low transconductance Operational Transconductance Amplifier (OTA) in 180nm CMOS technology. By virtue of operation in the weak inversion regime, lower current and power values are obtainable, thereby making the OTA suitable for use in the design of a low-power powerline frequency rejection filter of the sixth order. The use of ultra-low gm OTAs...
The feasibility of using commercial CMOS processes for implementing scalable cryogenic control electronics for universal quantum computers is investigated. Using a systems engineering approach, we break the system down into sub-systems and model the individual components down to transistor level. First results for area demand and power consumption indicate that even with a standard CMOS process, it...
In this paper, a novel nonlinear impulse sampler is presented. The architecture uses an ultrafast transmissionline based inductive peaking technique to turn on a high-speed sampling bipolar transistor for a few picoseconds. It is shown that the sampler can detect impulses as short as 100 ps. The chip is fabricated in IBM 9HP BiCMOS process technology and occupies an area of 1.02 mm2. The power consumption...
Modular multilevel converters (MMC) have many advantages owing to their power-stage modularity. However, this modularity does not extend directly to the control. Particularly, the balancing control usually requires central coordination and increases in complexity with the system size. This paper presents a balancing control method for a more general modular multilevel converter with series and parallel...
The power efficiency and performance of fully integrated charge pumps are highly dependent on the types of capacitors used in the pumping stages. A sample but not so well-known circuit technique that can minimize power losses is charge recycling applied to the parasitic capacitors always allocated with the useful capacitors at the core of every pumping stage. This paper discusses the possibility of...
The paper presents a 24 V chopper offset-stabilized operational amplifier with symmetrical RC notch filters, having a 4–24 V supply range, and being realized using a 0.25 ßm BCD process. The amplifier has a typical offset voltage of 1.2 μV, a minimum PSRR of 128 dB, a minimum CMRR of 120 dB, a minimum open-loop gain of 134dB, a noise PSD of 30 nV/√Hz, 1.8 MHz unity gain bandwidth, and THD + noise...
The paper concerns ferroelectric film features and their application in the field of memory ICs design. The results of FRAM test memory cells irradiation are shown and discussed. The current responses of the memory cells are presented as well as the calculated value of polarization The measurement complex used during the experiment is described.
In this paper, a non-overlap clock (NVC) generator for high accuracy fully differential Switched Capacitor (SC) readout circuit which is applied in Micro-Electro Mechanical System (MEMS) differential sensor is proposed. Compared with traditional generator, generating a set of non-overlap clock, this circuit generates a new set of clocks which are being nested inside the primary non-overlap clocks,...
This paper provides a novel voltage space vector modulation algorithm dedicated to the inverter fault-tolerant motor drive systems based on the four-switch inverter topology. The proposed technique ensures an accurate phase voltage modulation even under a DC-link voltage imbalance. Moreover, the capacitor voltages of the DC-link are leveled up so that the simultaneous motor drive operation is obtained...
This paper presents dc-dc converter based on voltage dividing class E amplifier. Class E2 dc-dc converter, which is one of the converter suitable for high operating frequency is studied. Class E2 dc-dc converter composed of a Class E amplifier and Class E rectifier. the amplifier side and rectifier side of class E2 dc-dc converter can achieve ZVS and ZDS. However, it is indicated that peak switch...
The paper proposes a new step-up topology with high step-up conversion ratio. Dc analysis is performed and the static characteristics are derived revealing that the static conversion ratio exhibits a high voltage boost, the converter still operating at reasonable duty cycles. Compared to a classical Boost, the static conversion ratio at the same duty cycle D is (1+nD) time higher, where n is the transformer...
This paper presents a CMOS circuit able to magnify the value of a reference bias current. The magnification factor can be programmed via a 10bit interface in the 1–1024 range. A time domain technique is used to compare a replica of the output current and a replica of the reference current. A negative feedback circuit minimizes the errors up to 1%.
This paper analyzes a new architecture of the AC/DC type power supply for data centers. The source cumulates the following functions: three-phase current rectification, transformation of voltage parameters and DC voltage stabilization. The source ensures the reactive power compensation and does not distort the currents in the power three-phase network. The transfer of power from the alternating current...
This paper presents the analysis and design of isolated voltage-fed single-switch soft-switched converter for magnetron filament heating. A step-down transformer is used to obtain the required voltage conversion ratio and isolation. By low-damped resonance, the primary transistor achieves zero-voltage switching. The secondary diode naturally attains zero-current switching due to discontinuous current...
The proposed and argued concept for realization includes the possibility of realizing an average of the medium voltage transformer, for example, with 10 / 0.22 kV parameters. Equipment with these parameters is known as Solid State Transformer (SST), which provides direct connection of consumers to the medium voltage power supply. The output frequency of these transformers is equal to the industrial...
This paper presents a clock-feedthrough compensation technique for bootstrapped switches. The proposed technique utilizes a dummy transistor to generate a reverse voltage, which compensates the input-dependent error caused by clock feedthrough effect of sampling switch. Simulation result shows the differential sampling error of bootstrapped switch reduces from 7.2mV to 1.4mV for the worst case, operating...
This paper describes the research made in order to realize a wireless energy transfer system used for mobile phones using electrically separated circuits. To carry out this study we used different types for wireless power transfer circuits: the first circuit works at a frequency of 128 kHz and the second circuit works at a frequency of 1.7 MHz. All circuits were made with an electronic software design...
A charge pump is DC/DC converter that produces a higher output voltage than power supply or generates a negative output voltage. Some variants of charge pumps work as voltage regulator, too. A charge pump is realised by capacitors, transistors and/or diodes. Therefore, some charge pumps are integrated directly to the systems that use these charge pumps. E.g. Flash or EEPROM memories are supplied from...
An operation of electronic equipment is dependent on a power supply. Today, a trend of only one AC/DC adapter is used for supplying an electronic system. Thus, an electronic equipment with various power supply requirements uses some internal DC/DC converters. These DC/DC converters adjust input voltage to lower or/and higher value or generate a negative voltage. The classical DC/DC converters are...
The very high voltage ratio has been achieved by introducing the switched-coupled-inductor to the quadratic boost converter and combining it with the diode-capacitor Dickson multiplier. The operating principles and steady-state analyses of continuous conduction mode are performed. The formulas to calculate the maximal voltage stresses on the transistor and on the diodes are provided. Simulation and...
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